Coded data generation or conversion – Digital code to digital code converters – To or from number of pulses
Reexamination Certificate
2000-12-08
2002-12-24
Tokar, Michael (Department: 2819)
Coded data generation or conversion
Digital code to digital code converters
To or from number of pulses
Reexamination Certificate
active
06498571
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to multiple stream switching mechanisms. More particularly, the present invention relates to enhanced context switching for variable length and/or fixed length packets of data. In some embodiments, the switching allows for context switching for two-way, or reversibly, encoded packets of data.
The Internet has provided a wealth of new information and information sources available to users. Typical types of information or data include text articles, images, sounds, videos, and the like. Presently, text articles (.html, .pdf, .txt, and the like), images (.jpg, .gif, .tiff, and the like), and sounds (.wav, .mp3, .pcm, and the like) can be provided to users in a short amount of time, depending upon the data. In other words, the users'connection bandwidth is such that data of this type can be downloaded to the user'client computers in fairly short amounts of time.
Several problems arise, however, with regards to the transfer of video data. One problem with regards to video data is that the user'bandwidth connections to the Internet are often narrow and often video playback is blocky, jumpy, and of poor resolution. As a result, the play back of such video data is often unsatisfactory. Another problem with regards to video data is that many formats for video data are pursued by major Internet companies. For example, streaming video formats are propagated by Microsoft, RealNetworks, Apple Computer, and the like. As a result, users are forced to download and install players for each of the many different formats. Yet another problem with regards to video data is that the processing power of the user'client may vary greatly. For example, the client may be a PDA, a cellular telephone, home computer, and the like. As a result, video servers may be wasting processing power when providing high bandwidth video data for clients with limited bandwidth.
One of the first companies to recognize the above problems was Luxxon Corporation of San Jose, Calif. The solutions proposed by Luxxon included providing servers with the ability to dynamically transcode video sources from one video format to another. Further, the solutions proposed further provided the ability for virtually any video data stream to be converted to a video data stream more consistent with the bandwidth and processing power of the client system. As a result, with the dynamic transcoding processes video data, or the like could be efficiently provided for client systems coupled to the network via telephone modems, via DSL or cable modems, via wireless methods, routers, and the like.
In light of the above, what is desired are methods and apparatus to expand the capabilities of the video servers by adding M to N, source to client processing, while reducing the need for redundant circuitry.
SUMMARY OF THE INVENTION
The present invention relates to M server to N client, multiple stream encoding and decoding mechanisms. More particularly, the present invention relates to enhanced context switching for variable length and/or fixed length packets of data.
According to an aspect of the present invention, an apparatus is described. The apparatus may include a first plurality of registers, each register in the first plurality of registers configured to store data wordss, a first selector coupled to the first plurality of registers, the first selector configured to receive a data words stored in each register in the first plurality of registers, and configured to output the data words from a selected register from the first plurality of registers in response to a selection signal, a second plurality of registers, each register in the second plurality of registers configured to store a pointer associated with each register in the first plurality of registers, and a second selector coupled to the second plurality of registers, the selector circuit configured to receive data from each register in the second plurality of registers, and configured to output data from a selected register from the second plurality of registers in response to the selection signal, the data comprising a pointer associated with the selected register from the first plurality of registers. The apparatus may also include a shifter coupled to the first selector and to the second selector circuit, the shifter configured to receive the data words from the selected register in the first plurality of registers, configured to receive the pointer, and configured to output a portion of the data words, the portion of the data words determined by the pointer, and a decoder coupled to the shifter, the decoder configured to receive the portion of the data words, and configured to output decoded data in response to the portion of the data words.
According to another aspect of the present invention, a method for decoding streams of encoded data is disclosed. The method may include receiving a first stream of encoded data, the first stream from a first source, receiving a second stream of encoded data, the second stream from a second source, storing a first set of data in a first register, the first set of data from the first stream of encoded data, and storing a second set of data in a second register, the second set of data from the second stream of encoded data. The technique may also include storing a first pointer in a third register, the first pointer associated with the first set of data, storing a second pointer in a fourth register, the second pointer associated with the second set of data and applying a first signal to a selector. When the first signal is applied to the selector, coupling the first register and the third register to a shifter, and outputting data with the shifter, the data comprising a portion of the first set of data in response to the first pointer. Further, when the first signal is not applied to the selector, coupling the second register and the fourth register to the shifter, and outputting data with the shifter, the data comprising a portion of the second set of data in response to the second pointer. Decoding the data from the shifter and outputting decoded data may also be included.
According to another aspect of the present invention, an encoding apparatus is disclosed that is configured to receive data input from data sources and offsets associated with the data sources. The apparatus may include a first plurality of registers, each register in the first plurality of registers configured to store data wordss, and a first selector coupled to the first plurality of registers, the first selector configured to receive a data words stored in each register in the first plurality of registers, and configured to output the data words from a selected register from the first plurality of registers in response to a selection signal. The encoding apparatus may also include a second plurality of registers, each register in the second plurality of registers configured to store a pointer, a second selector coupled to the second plurality of registers, the selector circuit configured to receive data from each register in the second plurality of registers, and configured to output data from a selected register from the second plurality of registers in response to the selection signal, the data comprising pointers associated with the data sources, and an accumulator coupled to the second selector, the accumulator configured to combine the pointers associated with the data sources and the offsets. A shift register coupled to the accumulator, the shift register configured to receive the data input, configured to receive output from the accumulator, and configured to output the data input at a shifted position in response to the output from the accumulator, and a logic circuit coupled to the shift register and to the first selector, the logic circuit configured to perform a logic function on the data words from the selected register and output from the shift register are also contemplated. The first plurality of registers is also coupled to the logic circuit and the first plurality of registers
Lauture Joseph
Luxxon Corporation
Tokar Michael
Townsend&Townsend&Crew LLP
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