Multiple slope analog-to-digital converter having increased line

Details Multiple slope analog-to-digital converter having increased line Multiple slope analog-to-digital converter having increased line

1994-08-09

1996-10-15

Hoff, Marc S.

Coded data generation or conversion

Analog to or from digital conversion

Analog to digital conversion

341129, H03M 152

Patent

active

055658695

ABSTRACT:
A multiple slope integrating analog-to-digital converter (ADC) includes an integrator and a comparator in which an input voltage to be measured is applied to a summing node at the input of the integrator during an integrate cycle, while at the same time positive and negative reference currents are selectively applied to the summing node by a controller which monitors the output of the comparator in order to come as close as possible to nulling the voltage magnitude at the output of the integrator. A controller keeps track of the charge that has been added to and removed from the integrator during the integrate cycle, and provides a coarse conversion value. The residual voltage is de-integrated to provide a fine conversion value, which is added to the coarse conversion value to provide a final value.
The switches which control selection of the positive and negative reference currents are implemented and operated in such a way that linear error due to current injected into the integrator is minimized, and increased conversion speed is exhibited. At any given time during the integrate cycle, only one switch at a time is ON.

REFERENCES:
patent: 5014058 (1991-05-01), Horn
patent: 5216426 (1993-06-01), Ishioka
patent: 5229771 (1993-07-01), Hanlon
patent: 5289187 (1994-02-01), Florin et al.
patent: 5321403 (1994-06-01), Eng, Jr. et al.

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