Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2011-06-07
2011-06-07
Geyer, Scott B (Department: 2812)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S015000, C439S055000, C439S366000, C439S377000, C361S679020, C361S807000
Reexamination Certificate
active
07955892
ABSTRACT:
Various sockets for multiple sizes of chip package substrates are disclosed. In one aspect, an apparatus is provided that includes a socket that has a peripheral wall defining an interior space adapted to receive either of a first semiconductor chip package substrate and a second semiconductor chip package substrate. The first semiconductor chip package substrate has a first size and a first plurality of structural features and the second semiconductor chip package substrate has a second size different than the first size and a second plurality of structural features. The socket has a third plurality of structural features operable to engage the structural features of either of semiconductor chip package substrates to selectively enable the first semiconductor chip package substrate to be located at a first preselected position in the interior space and the second semiconductor chip package substrate to be located at a second preselected position in the interior space.
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Ditthavong Mori & Steiner, P.C.
Geyer Scott B
Globalfoundries Inc.
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