Multiple screen processor for processing video image data...

Computer graphics processing and selective visual display system – Computer graphics processing – Attributes

Reexamination Certificate

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Details

C345S215000, C345S215000, C345S215000, C345S215000, C345S215000, C345S215000

Reexamination Certificate

active

06329998

ABSTRACT:

BACKGOUND OF THE INVENTION
The present invention relates to the digital television system and more particularly to a system for processing a variety of standardized video image data formats.
In the United States, the digital television (TV) standard allows many types of video image formats, i.e. transmission frequency rates of 24 Hz, 30 Hz, 60 Hz; progressive scanning and interlaced scanning; and screen resolutions of 480×640, 480×704, 720×1280, 1080×1920. Accordingly, a digital TV system must be capable of processing a variety of image formats, especially because formats may constantly change, even for the same channel. Additionally, the different types of image formats and/or frame rates may also affect the size of the video image on a screen window. Thus, a digital TV system for a multiple screen TV must process many different video image sizes and frame rates according to the incoming image formats, as well as generate the image on the appropriate window of the multiple screen TV.
Referring to
FIG. 1
, a multiple screen processor generally includes an image modifier (
10
), an address writer (
12
), an address reader (
14
), a field or frame memory (
16
), and a display processor (
18
). As shown, the image modifier (
10
) receives and modifies the input image to fit the display screen window size, and stores the reduced/enlarged video image in the appropriate address within the field memory (
16
) generated by the address writer (
12
). The address reader (
14
) timely reads the video image information stored in the field memory (
16
) and outputs the appropriate video image to the display processor (
18
). The display processor (
18
) additionally prepares the video image for display on the TV screen window.
FIG. 2
shows an alternative multiple screen processor including a primary screen selector (
20
), first and a second secondary screen processors (
22
), (
24
), a PIP processor (
26
), and a display processor (
28
). In such arrangement, the primary screen selector (
20
) selects only the necessary video images from image output of a tuner (not shown) and outputs the video image to the PIP processor (
26
). Secondary screen processors (
22
) and (
24
) fit the incoming video image to the display screen window size, store the image using a FIFO, and timely output the image to the PIP processor (
26
). The display processor (
28
) generates the final display screen in a timely manner using the outputs of the primary screen selector (
20
), and the first and second secondary screen processors (
22
), (
24
). More particularly, the primary screen selector (
20
) outputs the image to the display processor (
28
) at the time the primary screen is to be displayed, and the secondary screen processors (
22
), (
24
) outputs the image to the display processor (
28
) when the secondary screen is to be displayed.
The multiple screen processors as discussed above are capable of processing inputs of consistent video image formats and/or frame rates. However, the input images come in many different frame rates and/or data formats. For example,
FIG. 3
shows a consecutive display of the letter ‘A’ followed by the letter ‘B’ when the input frame rate is 24 Hz and the output display frame rate is 60 Hz. Because of the difference between the input and the display frame rates, the top portion of letter ‘B’ is overlapped by the residuary top portion of the previous letter ‘A.’ Thus the multiple screen processor has problems generating video image according to the changing image formats and frame rates.
OBJECTIVES OF THE INVENTION
The object of the present invention is to provide a multiple screen HDTV system for smoothly generating the multiple screen windows without any distortions or residuary image portions.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention. The objects and advantages of the invention may be realized and attained as particularly pointed out in the appended claims.


REFERENCES:
patent: 5091786 (1992-02-01), Miyaguchi
patent: 5479497 (1995-12-01), Kovarik
patent: 5719592 (1998-02-01), Misawa
patent: 5767894 (1998-06-01), Fuller et al.
patent: 5912710 (1999-06-01), Fugimoto
patent: 6016184 (2000-01-01), Haneda
patent: 6094230 (2000-07-01), Han

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