Multiple row fine pitch leadless leadframe package with use...

Details Multiple row fine pitch leadless leadframe package with use... Multiple row fine pitch leadless leadframe package with use...

2001-02-09

2004-01-06

Lee, Eddie (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With separate tie bar element or plural tie bars

C257S666000, C257S669000, C257S676000, C257S670000, C257S787000

Reexamination Certificate

active

06674156

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to semiconductor packaging and more particularly to improved leadless leadframe based packaging.
BACKGROUND
A leadless leadframe package (LLP) is a relatively new integrated circuit package design that contemplates the use of a metal (typically copper) leadframe type substrate structure in the formation of the conductive elements of a package.
FIG. 1A
illustrates a top plan view of a copper leadframe strip or panel
101
, which may be used to form leadless leadframe packages.
FIG. 1B and 1C
, each illustrate enlarged, top plan views of the leadframe strip
101
. Referring to
FIG. 1A
, the copper leadframe strip
101
is patterned (typically by stamping or etching) to define a plurality of arrays
103
of chip substrate features. Referring to
FIGS. 1B and 1C
, each chip substrate feature includes a die attach pad
107
and a plurality of contacts
109
disposed about their associated die attach pad
107
. Very fine tie bars
111
are used to support the die attach pads
107
and contacts
109
.
During assembly, dice are attached to the respective die attach pads
107
and conventional wire bonding is used to electrically couple bond pads on each die to their associated contacts
109
on the leadframe strip
101
. After the wire bonding, a plastic cap is molded over the top surface of the each array
103
of wire-bonded dice. The dice are then singulated and tested using conventional sawing and testing techniques. During singulation, the tie bars
111
are cut and therefore the only material holding the contacts
109
in place is the molding material. The resulting packaged chip can then be surface mounted on a printed circuit board or other substrate using conventional techniques.
Although leadless leadframe packaging has proven to be a cost-effective packaging arrangement, there are continuing efforts to further reduce the costs associated with packaging. Accordingly additional and improved leadless leadframe designs that are particularly well suited for use in relatively high pin count devices would be desirable.
SUMMARY
The present invention is directed towards a method of making a leadless leadframe panel through the technique of partial etching. The partial etching technique allows the tie bars, and the respective electrical contact pads, of the leadless leadframe to be placed in close proximity to each other. As a result, the packaged semiconductor devices formed from such leadless leadframes are able to have very fine pitch electrical contact pads. The method of the present invention involves partially etching a top surface of a substrate panel to form recessed regions that define a portion of a first and a second set of tie bars and a portion of a first and second set of contact pads. The method also involves partially etching a bottom surface of the panel to form lower recessed regions that define the remaining portion of the first and second set of tie bars and the remaining portion of the first and second set of contact pads. The resulting contact pads are connected to a respective one of the tie bars.
Another aspect of the invention is directed towards the leadless leadframe panel that results from the partial etching method. The leadless leadframe of the present invention includes a first and second set of tie bars and a first and second set of contact pads. The tie bars of the first and second set are formed in parallel formation wherein the tie bars of the first and second set are in an alternating formation. Each of the second set of tie bars has a thickness that is less than the thickness of the panel and the first and second set of tie bars are aligned with the top surface of the panel. The contact pads of the first and second set have contact surfaces that are coplanar with the bottom surface of said panel, and the maximum thickness of each of the first and second set of contact pads are equal to the thickness of the panel.
Another aspect of the invention is directed towards the leadless leadframe panel as described above with an additional feature of alternative bond surfaces. The alternative bonding surfaces are formed on the first and second set of tie bars between the respective first and second set of contact pads and a die attach pad. Each of the alternative bond surfaces have a thickness equal to the thickness of the panel so that the alternative bond surfaces are suitable for connection with one end of a bonding wire.
These and other features and advantages of the present invention will be presented in more detail in the following specification of the invention and the accompanying figures which illustrate by way of example the principles of the invention.


REFERENCES:
patent: 5654585 (1997-08-01), Nishikawa
patent: 6008528 (1999-12-01), Go et al.
patent: 6150709 (2000-11-01), Shin et al.
patent: 6229200 (2001-05-01), Mclellan et al.
patent: 6400004 (2002-06-01), Fan et al.

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