Boots – shoes – and leggings
Patent
1986-10-07
1989-06-13
Shaw, Gareth D.
Boots, shoes, and leggings
307464, 307219, 371 36, 371 61, G06F 104
Patent
active
048398551
ABSTRACT:
In a data processing device which consists of a plurality of parallel-operating modules, each of the four modules is provided with its own clock circuit. Synchronization is realized at the level of the cycle of the high frequency oscillation. This is realized in that each of the clock circuits includes a two-out-of-three majority decision device which is fed by the output clock signals of the other three clock circuits. The majority decision may have a simple logic structure and is connected to the actual clock function generator in order to reduce, using a readjustment circuit, the deviation between the clock function signal and the majority signal by a factor substantially smaller than one for each transition of the majority signal.
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Davies, D. et al., "Synchronization and Matching in Redundant Systems", IEEE Transactions on Computers, vol. C-27, No. 6, Jun. 1978, pp. 531-539.
Lewis, Daniel, "A Fault-Tolerant Clock Using Standby Sparing", Dig. of 9th IEEE Int. Symp. on Fault-Tolerant Computing, IEEE, 1979, pp. 33-39.
Barschall Anne E.
Briody Thomas A.
Fairbanks Jonathan C.
Haken Jack E.
Shaw Gareth D.
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