Multiple processor system having a correspondence table for tran

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364133, 3642293, 3642295, 364230, 364228, G06F 306

Patent

active

050620460

ABSTRACT:
A multiple processor system composed of a plurality of instruction processors allows a plurality of its subsystems for performing data processing in each unit to be operable simultaneously with and parallel to each other in each of the instruction processors. The multiple processor system has a processor designation table and a control processing subsystem. As the processor designation table specifies correspondence relation between a subsystem accessing to each input-output resource and the instruction processor executing the subsystem, the processing control subsystem transfers control of the processing to the instruction processor to be designated by the processor designation table in accordance with the subsystem to be used with reference to the processor designation table during execution of the data processing.

REFERENCES:
patent: 4484270 (1984-11-01), Quernemoen
patent: 4636947 (1987-01-01), Ward
patent: 4652940 (1988-03-01), Sumiyoshi et al.
patent: 4733349 (1987-03-01), Sumiyoshi et al.
patent: 4816989 (1989-03-01), Fin et al.

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