Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Reexamination Certificate
2000-12-29
2003-08-19
Vigushin, John B. (Department: 2827)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S788000, C361S803000, C710S306000
Reexamination Certificate
active
06608761
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to connecting electrical devices. More particularly, the present invention relates to bridging multiple PCI segments within a PCI chassis.
BACKGROUND OF THE INVENTION
Peripheral Component Interconnect (PCI) busses are well known in the field of personal computers (PCs). PCI busses are often used to interconnect a central processor unit (CPU) with other surrounding chips on a PC motherboard, or to connect various other computer components. The popularity and widespread acceptance of PCI busses for efficiently transferring signals among devices has been so great that variations have developed and become industry standards.
Compact PCI® is a variation of the PCI bus specification that is widely used in the field of industrial controls and instrumentation. The Compact PCI® Specification (PICMG 2.0 R3.0 Oct. 1, 1999) is an open specification supported by the PCI Industrial Computer Manufacturers Group (PICMG). Much hardware is available that complies with the Compact PCI® standards for rack mounted equipment. For the purposes of this disclosure, knowledge of Compact PCI® standards will be assumed. These standards will be referred to as the “CPCI” standards, which incorporate many aspects of the conventional PCI bus standards. Hardware and equipment designed to conform with the CPCI standards will be referred to as CPCI hardware or CPCI components. Unless explicitly described otherwise, for the purpose of the present disclosure, the CPCI standards for form factor 6U boards (233.35 mm by 160 mm) will be used.
The CPCI standards are primarily directed at configurations of PCI segments mounted in a chassis. Each PCI segment may contain up to 8 slots for individual cards. However, the same standards define chassis dimensions with the capacity for 21 slots. As a result of this difference between the maximum number of PCI cards in a PCI segment and the size of an off-the-shelf CPCI chassis, many embodiments of CPCI hardware do not fully utilize the chassis space. That is, they may use 8 slots for PCI cards and either leave the remaining space in the chassis unused, or use the space for non-PCI purposes.
In some contexts efficient space utilization is a particular concern. Telephone Company (Telco) switching offices are one. In such a Telco environment, a chassis with only 8 of 21 slots occupied by equipment is not desirable because it is an inefficient use of space. It would be desirable to have an apparatus or method to make more efficient use of the chassis capacity.
Increasing the number of slots in a bus segment to more than eight requires one or more PCI bridges. Such bridges, both transparent and non-transparent, are known to those of ordinary skill in the art. However, such bridges typcially occupy one of the slots in the CPCI chassis. It would be desirable to bridge between PCI segments without “tying up” a slot in the chassis thus allowing each of the 21 slots to be available for non-bridge PCI cards.
REFERENCES:
patent: 5848252 (1998-12-01), Granau et al.
patent: 6092139 (2000-07-01), Crane et al.
patent: 6112271 (2000-08-01), Lanus et al.
patent: 6282599 (2001-08-01), Gallick et al.
patent: 6349037 (2002-02-01), Draughn et al.
Intel Corporation
Kenyon & Kenyon
Vigushin John B.
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