Multiple phase clock generator

Details Multiple phase clock generator Multiple phase clock generator

1987-09-17

1988-12-27

Miller, Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307510, 307480, 307262, 328 72, 328155, 377124, 377126, 377129, H03K 513, H03K 1700, H03K 2354, H03K 1900

Patent

active

047942754

ABSTRACT:
A multiple phase clock generator includes a ring of an even number of phase cells, each phase cell generating a separate phased clock signal. Each phase cell supplies its phased clock signal and a prebias output signal in response to concurrent assertion of an enable signal and a prebias output signal from a preceding phase cell on the ring. Enable signals supplied to each phase cell around the ring are asserted and deasserted in response to state changes in a master clock signal, enable signals supplied to non-adjacent phase cells being provided concurrently. When initialized with one phase cell asserting its phased clock signal and prebias output signal, each transition of the master clock signal causes a next phase cell on the ring to supply its phased clock output signal.

REFERENCES:
patent: 3243728 (1966-03-01), Brainerd et al.
patent: 3329834 (1967-07-01), Klinikowski
patent: 4542301 (1985-09-01), Narabu
patent: 4700350 (1987-10-01), Douglas et al.

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