Multiple page memory

Details Multiple page memory Multiple page memory

1996-10-17

1998-08-11

Zarabian, A.

Static information storage and retrieval

Associative memories

Ferroelectric cell

36518905, 3652385, G11C 1500

Patent

active

057936633

ABSTRACT:
A memory system is able to simultaneously access multiple rows in page mode operation. The multiple page memory includes a memory array with multiple internal read registers to improve the effective page cycle time. The multiple page memory of this invention is very effective in graphics applications where multiple page memory access is required. A memory with multiple page random access in accordance with this invention greatly enhances performance by allowing different sources to continue to access the memory in the page mode, in spite of intervening memory accesses by other sources to other rows of the memory. A VRAM with multiple page random access in accordance with this invention provides an even higher performance graphic memory system.

REFERENCES:
patent: 4959811 (1990-09-01), Szczepanek
patent: 5111386 (1992-05-01), Fujishima et al.
patent: 5179372 (1993-01-01), West et al.
patent: 5206833 (1993-04-01), Lee
patent: 5210723 (1993-05-01), Bates et al.
Frame Buffer Architecture, NEC Application, Noe 89-16, 1991 Memory Data Book, NEC Electronics.
Computer Graphics Principles and Practice, 2nd ed., Foley, van Dam, Finer and hughes, Addison-Wesley Publishing Co., 1992, pp. 856-862.
Rambus, Inc., Architectural Overview, Copyright 1992.

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