Multiple layer phase-change memory

Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal – Responsive to electromagnetic radiation

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S102000, C257S042000, C257S052000

Reexamination Certificate

active

06998289

ABSTRACT:
A phase-change memory may be formed with at least two phase-change material layers separated by a barrier layer. The use of more than one phase-change layer enables a reduction in the programming volume while still providing adequate thermal insulation.

REFERENCES:
patent: 3801966 (1974-04-01), Terao
patent: 4115872 (1978-09-01), Bluhm
patent: 4203123 (1980-05-01), Shanks
patent: 4646266 (1987-02-01), Ovshinsky et al.
patent: 5166758 (1992-11-01), Ovshinsky et al.
patent: 5177567 (1993-01-01), Klersy et al.
patent: 5444302 (1995-08-01), Nakajima et al.
patent: 5789758 (1998-08-01), Reinberg
patent: 5920788 (1999-07-01), Reinberg
patent: 5952671 (1999-09-01), Reinberg et al.
patent: 5970372 (1999-10-01), Hart et al.
patent: 6117720 (2000-09-01), Harshfield
patent: 6507061 (2003-01-01), Hudgens et al.
patent: 6511862 (2003-01-01), Hudgens et al.
patent: 6737312 (2004-05-01), Moore
patent: 39 27 033 (1990-03-01), None
patent: 0 269 225 (1988-06-01), None
patent: 0 449 121 (1991-10-01), None
patent: 0 957 477 (1999-11-01), None
patent: 1 187 119 (2002-03-01), None
patent: 1 202 285 (2002-04-01), None
patent: 1 202 285 (2002-05-01), None
patent: 60-164937 AA (1985-08-01), None
patent: WO 98/19350 (1997-10-01), None
patent: WO 98/19350 (1998-05-01), None
Hwang, Y.N., Hong, J.S., Lee, S.H., Ahn, S.J., Jeong, G.T., Koh, G.H., Kim, H.J., Jeong, W.C., Lee, S.Y., Park, J.H., Ryoo, K.C.., Horii, H., Ha, Y.H., Yi, J.H., Cho, W.Y., Kim, Y.T., Lee, K.H., Joo, S.H., Park, S.O., Jeong, U.I., Jeong, H.S. and Kim, Kinam, “Completely CMOS-Compatible Phase-Change Nonvolatile RAM Using NMOS Cell Transistors,” presented at 2003 19thIEEE Non-Volatile Semiconductor Memory Workshop, Monterey, California, Feb. 26-20, 2003.
Ha, Y.H., Yi, J.H., Horii, H., Park, J.H., Joo, S.H., Park, S.O., Chung, U-In and Moon, J.T., “An Edge Contact Type Cell for Phase Change RAM Featuring Very Low Power Consumption,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Hwang, Y.N., Hong, J.S., Lee, S.H., Ahn, S.J., Jeong, G.T., Koh, G.H., Oh, J.H., Kim, H.J., Jeong, W.C., Lee, S.Y., Park, J.H., Ryoo, K.C., Horii, H., Ha, Y.H., Yi, J.H., Cho, W.Y., Kim, Y.T., Lee, K.H., Joo, S.H., Park, S.O., Chung, U.I., Jeong, H.S. and Kim, Kinam, “Full Integration and Reliability Evaluation of Phase-change RAM Based on 0.24 mm-CMOS Technologies,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.
Horii, H., Yi, J.H., Park, J.H., Ha, Y.H., Baek, I.G., Park, S.O., Hwang, Y.N., Lee, S.H., Kim, Y.T., Lee, K.H., Chung, U-In and Moon, J.T., “A Novel Cell Technology Using N-doped GeSbTe Films for Phase Change RAM,” presented at IEEE 2003 Symposium on VLSI Technology, Kyoto, Japan, Jun. 12-14, 2003.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Multiple layer phase-change memory does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multiple layer phase-change memory, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiple layer phase-change memory will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3627398

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.