Multiple layer module structure for printed circuit board

Details Multiple layer module structure for printed circuit board Multiple layer module structure for printed circuit board

1999-03-22

2001-07-24

Paladini, Albert W. (Department: 2841)

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

C174S260000, C361S760000, C361S780000, C361S795000

Reexamination Certificate

active

06265672

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention is related to a printed circuit board (PCB), and more particularly to a multiple layer module structure taking into account impedance, noise and signal interference.
In general, a multi-layer module for PCB in a direct Rambles Rim module which includes eight layers and is designed by taking into account impedance, noise and signal interference. For example, as shown in
FIG. 1
, a PCB multiple layer module
1
for a PCB including eight layers comprises a first layer
11
formed as an uppermost layer and which components are disposed therein, a second layer
12
for matching the impedance of the first layer
11
and protecting signals from the noise and interference, a third layer
13
for receiving and outputting signals which is disposed under the second layer
12
, a fourth layer
14
which the power Vdd is supplied thereto and is disposed under the third layer
13
as a power layer, a fifth layer
15
which is disposed under the fourth layer
14
as a ground layer, a sixth layer
16
for receiving and outputting signals which is disposed under the fifth layer
15
, a seventh layer
17
which is disposed under the sixth layer
16
as a ground layer and an eighth layer
18
which is disposed under the seventh layer
17
.
In the prior 8-layer module
1
, the second layer
12
is formed as a ground layer under the first layer
11
so as to prevent the noise and signal interface between components disposed in the first layer
11
. The second layer
12
which is a ground layer and the fourth layer
14
which is a power layer, are disposed above and below the third layer
13
which receives and outputs the signals. The fifth layer
15
and the seventh layer
17
which are ground layers, are disposed above and below the sixth layer
16
which receives and outputs signals. The eighth layer
18
which is a lowermost layer, is disposed below the seventh layer
17
which is a ground layer.
That is, the layers disposed above and below the layer where components are disposed or the signals are received and outputted, are wrapped in copper so as to prevent interference and match the impedance therebetween. In other words, so as to prevent the signal interference and the noise of the layers, it made the second layer
12
as a ground layer wrapped in copper. The second layer
12
as a ground layer and the fourth layer
14
as a power layer which are disposed below and above the third layer
13
respectively, are wrapped in copper and the fifth layer
15
and the seventh layer
17
which are disposed respectively as a ground layer below and above the sixth layer
16
, are wrapped in copper. In the eighth layer
18
, only the signal lines are wrapped in copper.
However, the prior multiple layer module has a disadvantage that it is constituted in eight layers so that the fabrication process is complicated and the yield is degraded.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a PCB of multiple layer module structure having six layers which increases the yield due to the process reduction.
According to an aspect of the present invention, there is provided a printed circuit board having multiple layer module structure, comprising: a copper film for removing signal interference and noise and matching impedance, being formed between pads of a lowermost layer which are connected to solder balls of an uppermost layer and in a patterned portion of the lowermost layer which corresponds to patterns formed in a layer just above the lowermost layer.
According to another aspect of the present invention, there is provided a printed circuit board having a multiple layer module structure, comprising: a first layer which components are disposed therein; a second layer for removing signal interference and noise of the first layer and for matching impedance of the first layer, the second layer being disposed under the first layer as a ground layer; a third layer being disposed under the second layer as a signal layer; a fourth layer for matching impedance of the third layer, the fourth layer being disposed under the third layer as a power layer; a fifth layer being disposed under the fourth layer as a signal layer; and a sixth layer for removing signal interference and noise and for matching impedance of the fifth layer, on which a copper film is formed in the patterned portion thereof corresponding to patterns of the fifth layer and between pads connected to solder balls of the first layer.
Hereinafter, a preferred embodiment of the present invention will be described with reference to the attached drawings.


REFERENCES:
patent: 5574630 (1996-11-01), Kresge et al.
patent: 5640048 (1997-06-01), Selna
patent: 5714718 (1998-02-01), Tanaka
patent: 5719750 (1998-02-01), Iwane
patent: 5726863 (1998-03-01), Nakayama et al.
patent: 5847936 (1998-12-01), Forehand et al.
patent: 5912809 (1999-06-01), Steigerwald et al.
patent: 5926377 (1999-07-01), Nakao et al.
patent: 6084779 (2000-07-01), Fang

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