Electrical computers and digital processing systems: processing – Processing architecture – Superscalar
Patent
1993-01-04
2000-02-29
Kim, Kenneth S.
Electrical computers and digital processing systems: processing
Processing architecture
Superscalar
712215, 712244, 712245, G06F 938
Patent
active
060322446
ABSTRACT:
The present invention features a computer with a mechanism for implementing precise interrupts for statically speculated instructions. One or more assumptions are generated, and all instructions in each assumption are tagged identically and statically scheduled on a speculative basis. An instruction is then modified or inserted at one or more decision points prior to the point at which the instruction was speculated. The decision points may be positive ones (the instructions scheduled under that assumption have succeeded) or negative ones (the instructions scheduled under that assumption have failed), or both. A decision point may be positive for one assumption and negative for another assumption. Static speculation may be performed down both sides of branches and may be performed simultaneously for multiple, independent paths. Efficient restart can also be effected.
REFERENCES:
patent: 5072364 (1991-12-01), Jardine et al.
patent: 5127091 (1992-06-01), Boufarah et al.
patent: 5226126 (1993-07-01), McFarland et al.
patent: 5257354 (1993-10-01), Comfort et al.
Smith, Jane E. et al "Implementing Precise Interrupts in Pipeline Processors" IEEE Transaction on Computers, vol. 37, No. 5, May 1988.
Ebciogln, Kemal "Some design ideas for a VLIW architecture for sequential natured software" Apr. 1988 Parallel Processing Elsevier Science Publishers (North-Holland).
Smith, Michael D. et al "Boosting Beyond Static Scheduling in a Superscalar Processor" (IEEE) May 1990 Proceedings on 17th Internation Symposium on Computer Architecture.
Mahlke, Scott A. et al "Sentinel Scheduling for VLIW and Superscalar Processors" ACM 1992.
Cornell Research Foundation Inc.
Kim Kenneth S.
LandOfFree
Multiple issue static speculative instruction scheduling with pa does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multiple issue static speculative instruction scheduling with pa, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multiple issue static speculative instruction scheduling with pa will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-693002