Multiple interrupt tri-level microprocessor operating system

Details Multiple interrupt tri-level microprocessor operating system Multiple interrupt tri-level microprocessor operating system

1987-10-19

1991-03-19

Lee, Thomas C.

Boots, shoes, and leggings

364941, 3649411, 3649413, 3649415, 364919, 3649192, 364976, G06F 946

Patent

active

050016660

ABSTRACT:
A multiple interrupt tri-level microprocessor operating system (40) having particularly applicability in a two-way radio, includes an operating system that provides a background executive (47) to allow processing of time insensitive tasks, a foreground routine (24) to allow processing of real-time sensitive tasks, and a midground executive (41) to allow processing of time sensitive tasks. The midground executive (41) provides for periodic execution of preselected tasks, which tasks can all be completed within a predetermined period of time.

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