Multiple insulating layer for two-level interconnected metalliza

Details Multiple insulating layer for two-level interconnected metalliza Multiple insulating layer for two-level interconnected metalliza

1989-05-24

1991-01-15

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437228, 437982, 148133, 148135, H01L 21443

Patent

active

049853732

ABSTRACT:
Insulation between first and second levels of aluminum metallization in semiconductor integrated circuit structures comprises a plasma planarized, deposited silicon dioxide layer and another silicon dioxide layer deposited upon said plasma planarized layer.

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