Multiple-input sense amplifier with two CMOS differential stages

Details Multiple-input sense amplifier with two CMOS differential stages Multiple-input sense amplifier with two CMOS differential stages

1985-01-07

1987-03-10

Anagnos, Larry N.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

365190, 365104, 365208, 307355, 307362, H03K 524, G11C 706

Patent

active

046493018

ABSTRACT:
A multiple input differential sense amplifier including a pair of signal inputs and comprising a bank of n-channel MOS transistors for receiving said multiple inputs for connection to one of said signal inputs. The other of said signal inputs can be provided with a fixed bias input, or a complementary input from a complementary bank of n-channel MOS transistors.

REFERENCES:
patent: 4342004 (1982-07-01), Iida et al.
patent: 4375619 (1983-03-01), Saari
patent: 4479202 (1984-10-01), Uchida
patent: 4504748 (1985-03-01), Oritani
patent: 4507759 (1985-03-01), Yasui et al.
patent: 4539494 (1985-09-01), Kurafuji
Chan, "Bit-Select Sense Amplifier"; IBM-TDB; vol. 24, No. 11A, pp. 5654-5656; 4/1982.

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