Multiple input/output read/write memory having a multiple-cycle

Details Multiple input/output read/write memory having a multiple-cycle Multiple input/output read/write memory having a multiple-cycle

1987-05-21

1989-03-28

Moffitt, James W.

Static information storage and retrieval

Addressing

365195, G11C 800

Patent

active

048170585

ABSTRACT:
A dual-port random access memory with multiple random inputs is disclosed which has a write mask register. The write mask allows a random write operation to occur on a subset of the random inputs, with the selected memory cells remaining undisturbed by the write operation. The write mask register provides for storage of the write mask information for a plurality of cycles, including intervening cycles which are unmasked writes. The write mask register may be loaded in two separate modes, either early in a cycle in conjunction with the row address strobe signal, or later in the cycle in conjunction with the write enable signal.

REFERENCES:
patent: 3761902 (1973-09-01), Weinberger
patent: 4044338 (1977-08-01), Wolf
patent: 4159538 (1979-06-01), Motsch
patent: 4636986 (1987-01-01), Pinkham
Hitachi Semiconductor & Integrated Circuits Div., "Preliminary Target Spec. Hm53462-10/12/15" Jun. 7, 1985.

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