Multiple input digital video features processor for TV signals

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358 22, H04N 5262, H04N 5272

Patent

active

047823917

ABSTRACT:
A video features processor for use with a display device includes a first clock that is line locked to the display and a skew-shifted second clock that is phase locked to the horizontal sync component of an auxiliary video signal. An A/D converter, responsive to the skew-shifted clock, develops digital samples representative of the auxiliary video signal. A clock transfer circuit, responsive to the line-locked and skew-shifted clocks, translates digital samples occurring synchronously with the skew-shifted clock signal to digital samples occurring synchronously with the line-locked clock signal. The digital samples occurring synchronously with the line-locked clock signal are stored in a memory.

REFERENCES:
patent: 3911368 (1975-10-01), Tarczy-Hornoch
patent: 4139860 (1979-02-01), Micie
patent: 4635097 (1987-01-01), Tatami
patent: 4636515 (1987-04-01), Christopher
patent: 4673983 (1987-06-01), Sarugaku et al.

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