Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With mating connector which receives panel circuit edge
Reexamination Certificate
2004-11-17
2011-11-29
Patel, Tulsidas C (Department: 2839)
Electrical connectors
Preformed panel circuit arrangement, e.g., pcb, icm, dip,...
With mating connector which receives panel circuit edge
Reexamination Certificate
active
08066515
ABSTRACT:
A system provides a digital multi-bit connection between two or more graphics adapters. Each graphics adapter is manufactured as a printed circuit board including a finger-type edge connector. When two or more graphics adapters are installed in a system the edge connectors of each graphics adapter may be coupled to each other via a connection device that provides a portion of the digital multi-bit connection. The remainder of the digital multi-bit connection is provided by conductive traces coupling each finger of the edge connector to a graphics processing unit that is affixed to the graphics adapter. The connection device may be installed by an end-user as each additional graphics adapter is installed in the system.
REFERENCES:
patent: 3492538 (1970-01-01), Fergusson
patent: 4647123 (1987-03-01), Chin et al.
patent: 5448655 (1995-09-01), Yamaguchi
patent: 5502808 (1996-03-01), Goddard et al.
patent: 5522027 (1996-05-01), Matsumoto et al.
patent: 5784628 (1998-07-01), Reneris
patent: 5794016 (1998-08-01), Kelleher
patent: 5936640 (1999-08-01), Horan et al.
patent: 5999198 (1999-12-01), Horan et al.
patent: 6023281 (2000-02-01), Grigor et al.
patent: 6111757 (2000-08-01), Dell et al.
patent: 6191800 (2001-02-01), Arenburg et al.
patent: 6195734 (2001-02-01), Porterfield
patent: 6253299 (2001-06-01), Smith et al.
patent: 6296493 (2001-10-01), Michiya
patent: 6326973 (2001-12-01), Behrbaum et al.
patent: 6329996 (2001-12-01), Bowen et al.
patent: 6473086 (2002-10-01), Morein et al.
patent: 6501999 (2002-12-01), Cai
patent: 6535939 (2003-03-01), Arimilli et al.
patent: 6593932 (2003-07-01), Porterfield
patent: 6631474 (2003-10-01), Cai et al.
patent: 6633296 (2003-10-01), Laksono et al.
patent: 6683614 (2004-01-01), Walls et al.
patent: 6711638 (2004-03-01), Wu
patent: 6750870 (2004-06-01), Olarig
patent: 6760031 (2004-07-01), Langendorf et al.
patent: 6882346 (2005-04-01), Lefebvre et al.
patent: 6902419 (2005-06-01), Conway et al.
patent: 6919896 (2005-07-01), Sasaki et al.
patent: 7030837 (2006-04-01), Vong et al.
patent: 7176847 (2007-02-01), Loh
patent: 7184003 (2007-02-01), Cupps et al.
patent: 2002/0047851 (2002-04-01), Hirase et al.
patent: 2002/0093507 (2002-07-01), Olarig
patent: 2002/0105523 (2002-08-01), Behrbaum et al.
patent: 2002/0118201 (2002-08-01), Mukherjee et al.
patent: 2003/0128216 (2003-07-01), Walls et al.
patent: 2003/0137483 (2003-07-01), Callway
patent: 2004/0072460 (2004-04-01), Conway et al.
patent: 2004/0104913 (2004-06-01), Walls et al.
patent: 2005/0017980 (2005-01-01), Chang et al.
patent: 2005/0088445 (2005-04-01), Gonzalez et al.
patent: 2005/0134588 (2005-06-01), Aila et al.
patent: 2005/0160212 (2005-07-01), Caruk
patent: 2005/0278559 (2005-12-01), Sutradja et al.
patent: 0428277 (1991-05-01), None
patent: 0571969 (1993-12-01), None
patent: 2834097 (2003-06-01), None
patent: 2839563 (2003-11-01), None
patent: 5324583 (1993-12-01), None
patent: 328392 (1998-03-01), None
patent: 570243 (2004-01-01), None
patent: WO 03/083636 (2003-10-01), None
Weinand, Lars. “NVIDIA lance le SLI: une technologie multi-GPU.” Jun. 29, 2004, retrieved on Apr. 16, 2008 from: http://www.erenumerique.fr
vidia—lance—le—sli—une—technologie—multi—gpu-art-655-1.html. pp. 1-12.
English Translation of: Weinand, Lars. “NVIDIA lance le SLI: une technologie multi-GPU.” Jun. 29, 2004, retrieved on Apr. 16, 2008 from: http://www.erenumerique.fr
vidia—lance—le—sli—une—technologie—multi—gpu-art-655-1.html. pp. 1-12.
Whitman, Scott, “Dynamic Load Balancing for Parallel Polygon Rendering,” IEEE Computer Graphics and Applications, IEEE Inc., New York, vol. 14, No. 4, Jul. 1, 1994.
Henry Fuchs, Distributing a visible surface algorithm over multiple processors, Proceedings of the 1977 annual conference, p. 449-451. Jan. 1977.
Edward Brown, Andy Thorne, “FireWire Audio Application utilizing high quality 96kHz 24bit I/O”, Copyright Oxford Semiconductor 2004 © External—Free Release, Jul. 2004.
Marc Prieur, “NVIDIA GeForce 6600 GT—HardWare.fr,” Sep. 7, 2004, retrieved from http://www.hardware.fr/art/imprimer/514, pp. 1-23.
English translation of: Marc Prieur, “NVIDIA GeForce 6600 GT—HardWare.fr,” Sep. 7, 2004, retrieved from http://www.hardware.fr/art/imprimer/514. pp. 1-24.
Scott Wasson, “NVIDIA's SLI Resurrects GPU Teaming: Kickin' It Old School—With 32 Pipes”, Jun. 28, 2004, retrieved from http://techreport.com/articles.x/6931. 5 pgs.
PCT Search Report.
Wasson, “NVIDIA's SLI resurrects GPU teaming Kickin' it old school—with 32 pipes”, www.techreport.com, Jun. 28, 2004, pp. 1-3, http://techreport.com/etc/2004q2
vidia-sli/.
Weinand, “NVIDIA lance le SLI: une technologie multi-GPU”, www.erenumerique.fr, Jun. 29, 2004. pp. 1-7 http://www.erenumerique.fr
vidia—lance—le—sli—une—technologie—multi—gpu-art-655-7.html.
“Alienware Announces Video Array and X2: An Exclusive Advancement in PC Graphics Technology”, Alienware, May 12, 2004, <http://www.alienware.com/press—release—pages/press—release—template.aspx?FileName=press051204.asp>.
Alienware Promises Fastest Graphics Solution, Alienware, Jun. 28, 2004, <http://www.alienware.com/press—release—pages/press—release—template.aspx?FileName=press062804.asp>.
“Frequently Asked Questions”, Alienware, Oct. 22, 2004, <http://www.alienware.com/alx—pages/main—content.aspx>.
Office Action. U.S. Appl. No. 11/012,394. Dated Apr. 28, 2009.
Translated Search Report for ROC (Taiwan) Patent Application No. 094140479, provided as concise explanation of relevance of TW 570243 and TW 328392, date of completion Feb. 15, 2009.
Office Action. U.S. Appl. No. 10/950,609. Dated Feb. 26, 2009.
Final Office Action. U.S. Appl. No. 11/012,394 dtd. Nov. 6, 2009.
Angelly, Clay. “NVIDIA GeForce 6600 Series Preview,” nvnews, published on Aug. 12, 2004 (available at URL: http://www.nvnews.net/previews/geforce—6600—series/).
Gotoh, Hirosige, “Weekly Overseas News: NVIDIA Dual-GPU Solutions,” PCWatch home page, published on Jun. 29, 2004 (available at URL: http://pc.watch.impress.co.jp/docs/2004/0629/kaigai099.htm).
Gotoh, Hirosige, “Weekly Overseas News: Questions Many of NVIDIA's SLI,” PC Watch home page, published on Aug. 30, 2004 (available at URL: http://pc.watch.impress.co.jp/docs/2004/0830/kaigai113.htm).
English translation of: Gotoh, Hirosige, “Weekly Overseas News: NVIDIA Dual-GPU Solutions,” PCWatch home page, published on Jun. 29, 2004 (available at URL: http://pc.watch.impress.co.jp/docs/2004/0629/kaigai099.htm).
English translation of: Gotoh, Hirosige, “Weekly Overseas News: Questions Many of NVIDIA's SLI,” PC Watch home page, published on Aug. 30, 2004 (available at URL: http://pc.watch.impress.co.jp/docs/2004/0830/kaigai113.htm).
Excepts from letter received from foreign associate re. JP Patent App. No. 2007-543190, dated Feb. 1, 2010, provided as explanation of relevance of foreign language references.
Sassen, Sander. “NVIDIA SLI, SLI's back with a vengeance,” hardwareanalysis.com, Jun. 28, 2004.
Anand, Vijay. “NVIDIA's Scalable Link Interface (SLI),” HardwareZone.com, Jun. 30, 2004.
Final Office Action, U.S. Appl. No. 11/013,078, dtd Jul. 1, 2010.
Office Action, U.S. Appl. No. 11/013,078 dated Dec. 27, 2010.
Office Action, U.S. Appl. No. 11/012,394 dated Jan. 20, 2011.
Jatou Ross F.
Johnson Philip B.
Mimberg Ludger
Yu Liping
Nguyen Phuong
NVIDIA Corporation
Patel Tulsidas C
Patterson & Sheridan LLP
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