Multiple-gate transistor structure

Details Multiple-gate transistor structure Multiple-gate transistor structure

2002-12-06

2010-06-01

Monbleau, Davienne (Department: 2893)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

C257S308000, C257S722000, C257SE21014

Reexamination Certificate

active

07728360

ABSTRACT:
A multiple-gate transistor structure which includes a substrate, source and drain islands formed in a portion of the substrate, a fin formed of a semi-conducting material that has a top surface and two sidewall surfaces, a gate dielectric layer overlying the fin, and a gate electrode wrapping around the fin on the top surface and the two sidewall surfaces separating source and drain islands. In an alternate embodiment, a substrate that has a depression of an undercut or a notch in a top surface of the substrate is utilized.

REFERENCES:
patent: 6413802 (2002-07-01), Hu et al.
patent: 6475869 (2002-11-01), Yu
patent: 6562491 (2003-05-01), Jeon
patent: 6768158 (2004-07-01), Lee et al.
patent: 6833588 (2004-12-01), Yu et al.
patent: 6855990 (2005-02-01), Hu et al.
patent: 6864519 (2005-03-01), Yeo et al.
patent: 2002/0011612 (2002-01-01), Hieda
patent: 2003/0042531 (2003-03-01), Lee et al.
patent: 2004/0036126 (2004-02-01), Chau et al.

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