Multiple fin formation

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S164000, C438S197000, C257SE29028, C257SE21236, C257SE21377

Reexamination Certificate

active

11240243

ABSTRACT:
A FinFET includes a plurality of semiconductor fins. Over a semiconductor layer, patterned features (e.g. of minimum photolithographic size and spacing) are formed. In one example of fin formation, a first set of sidewall spacers are formed adjacent to the sides of these patterned features. A second set of sidewall spacers of a different material are formed adjacent to the sides of the first set of sidewall spacers. The first set of sidewall spacers are removed leaving the second set of sidewall spacers spaced from the patterned features. Both the second set of sidewall spacers and the patterned features are used as a mask to an etch that leaves semiconductor fins patterned as per the second set of sidewall spacers and the patterned features. These resulting semiconductor fins, which have sub-lithographic spacings, are then used for channels of a FinFET transistor.

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Choi et al, “Spacer FinFET: Nano-scale CMOS Technology for the Terabit Era”, pp. 543-546.
Choi et al, “Nanoscale CMOS Spacer FinFET for the Terabit Era”, IEEE Electron Device Letters, vol. 23, pp. 25-27.

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