Multiple compound domino logic circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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307452, 307480, H03K 19094, H03K 1920

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active

052084892

ABSTRACT:
A multiple compound CMOS domino circuit (234) is disclosed having a first input section (248) connected to a preliminary dynamic output node (244). A second input section (250) is connected to a preliminary output dynamic node (246) which is independent of the first dynamic node (244). Separate precharge devices (236, 238) precharge the respective dynamic nodes (244, 246) to a desired voltage. Separate discharge transistors (240, 242) operate in conjunction with the respective input sections (248, 250) to discharge the dynamic nodes (244, 246). Static output logic gates (252, 254) include inputs connected to the dynamic nodes (244, 246) and provide multiple outputs of the compound domino logic circuit (234).

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patent: 4804867 (1989-02-01), Okitaka et al.
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patent: 4920282 (1990-04-01), Muraoka et al.
1981 IEEE ISSC Conference, Feb. 20, 1981 Session XVI, Murphy et al.
IBM Tech. Disc. Bul. vol. 16, No. 2, Jul. 1973 "Dynamic Logic Circuit", Cole et al.
"Ultrafast Compact 32-bit CMOS Adders in Multiple-Output Domino Logic", Hwang & Fisher, IEEE Journal of Solid-State Circuits, vol. 24, No. 2, Apr. 1989, pp. 358-368.
"Tham 11.2: A 3.Ins. 326 CMOS Adder in Multiple Output Domino Logic", Hwang & Fisher, 1988 IEEE International Solid-State Circuits Conference, Thursday, Feb. 18, 1988, pp. 140-141.

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