Multiple clock selection system

Details Multiple clock selection system Multiple clock selection system

1978-05-22

1980-10-21

Miller, Jr., Stanley D.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307243, 307269, 328104, H03K 117

Patent

active

042296994

ABSTRACT:
A system for switching among a plurality of input clock signals to produce an output clock signal which avoids the presence of spurious signals during the process of switching from one to another of said plurality of input clock signals. When it is desired to switch from one input clock signal to a new input clock signal, clock output logic is inhibited from supplying any clock output signal for a selected time period, after which the newly selected input clock signal is supplied as the clock output signal. The time period is dependent on the clock pulse rate of the newly selected input clock signal and is sufficiently long to assure that no spurious signals will occur thereafter.

REFERENCES:
patent: 3329905 (1967-07-01), Niertil et al.
patent: 3414736 (1968-12-01), Hagee
patent: 3932816 (1976-01-01), MacGregor

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