Multiple bit per cell non volatile memory apparatus and...

Details Multiple bit per cell non volatile memory apparatus and... Multiple bit per cell non volatile memory apparatus and...

2011-05-31

2011-05-31

Yoha, Connie C (Department: 2827)

Static information storage and retrieval

Floating gate

Multiple values

C365S185070, C365S185180

Reexamination Certificate

active

07952923

ABSTRACT:
A Multiple-bit per Cell (MBC) non-volatile memory apparatus, method, and system wherein a controller for writing/reading data to/from a memory array controls polarity of data by selectively inverting data words to maximize a number of bits to be programmed within (M−1) virtual pages and selectively inverts data words to minimize a number of bits to be programmed in an Mthvirtual page where M is the number of bits per cell. A corresponding polarity control flag is set when a data word is inverted. Data is selectively inverted according the corresponding polarity flag when being read from the M virtual pages. A number of the highest threshold voltage programming states in reduced. This provides tighter distribution of programmed cell threshold voltage, reduced power consumption, reduced programming time, and enhanced device reliability.

REFERENCES:
patent: 7729166 (2010-06-01), Kim et al.

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