Electrical computers and digital processing systems: multicomput – Multicomputer synchronizing
Reexamination Certificate
2006-02-07
2006-02-07
Vaughn, Jr., William C. (Department: 2143)
Electrical computers and digital processing systems: multicomput
Multicomputer synchronizing
C709S236000, C710S061000
Reexamination Certificate
active
06996632
ABSTRACT:
A multiphase encoded protocol has sufficient density of commands to allow a rich language to be realized on a bus. When ten field bits are dedicated to commands, it is possible to have more than six million words to choose from per clock. Architecture to implement the multiphase encoded protocol and synchronize the bus includes an extracted clock, a command element, and a data element. One-bit multipliers are used as correlation elements to provide feedback into slaved delay-locked loop (DLL) devices, which provides precise phase alignment for successful data extraction of several channels.
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Levy Paul S.
Mauritz Karl H.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Vaughn, Jr. William C.
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