Multiphase clock synthesizer having a plurality of phase shifted

Oscillators – Automatic frequency stabilization using a phase or frequency... – Plural a.f.s. for a single oscillator

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331 1A, 331 16, 331 17, 331 18, 331 25, 327107, 327156, H03L 707, H03L 7087, H03L 718

Patent

active

055505155

ABSTRACT:
A phase-locked loop wherein the output signal is effectively sampled at an increased rate from conventional phase-locked loops, allowing for a greater increase in the ratio of the output frequency to the input frequency while reducing the possibility of jitter or failure to lock. Multiple differently phased reference signals and correspondingly phased feedback signals are produced. The comparison of the feedback signals and the reference signals produce multiple error signals which are combined to adjust the oscillation frequency of the voltage-controlled oscillator.

REFERENCES:
patent: 3571743 (1971-03-01), Menkes
patent: 4888564 (1989-12-01), Ishigaki
patent: 5315269 (1994-05-01), Fujii

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