Multimode output stage converting differential to...

Amplifiers – With semiconductor amplifying device – Including gain control means

Reexamination Certificate

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C330S282000, C330S278000, C330S311000

Reexamination Certificate

active

06806771

ABSTRACT:

BACKGROUND
1. Technical Field
The invention relates to analog integrated circuit design and, more particularly, to an output stage for an in-system programmable analog device, wherein the output stage provides a differential-to-single-ended conversion and is amenable to a number of selectable modes of operation.
2. Description of the Related Art
Typically, analog integrated circuits are designed to receive one or more analog input signals, and to process those signals by performing specific functions such as amplification, attenuation, filtering, integration, addition and subtraction. These functions usually dictate the topology of the analog integrated circuit. For example, the topologic arrangement of operational amplifiers and resistors are adjusted to provide either inverting or noninverting gain. Every topology has specific noise, distortion and offset voltage sensitivities. Alteration in the function required of an analog circuit often requires a change in the topology of the circuit, with attendant respect to the noise, distortion and offset voltage characteristics of the circuit.
An analog integrated circuit with a programmable analog circuit block architecture permits change in a function of the analog circuit without modification to the topology of the circuit elements, thereby mitigating changes in voltage offset and distortion created by changes in topology. Examples of such analog integrated circuit architectures can be found in U.S. Pat. No. 5,574,678, Continuous Time Programmable Analog Block Architecture, to James L. Gorecki, (the “Gorecki patent”), which is incorporated herein by reference in its entirety for all purposes.
Programmable analog integrated circuits, such as those disclosed in the Gorecki patent, typically include analog circuit blocks interconnected by a programmable interconnect structure and provide a self-contained integrated circuit architecture that supports fundamental analog signal processing functions. The analog circuit blocks include basic circuit elements, such as operational amplifiers, resistors, and capacitors, which can be programmably connected in a variety of circuit configurations. Users can define the functionality of individual blocks, control their respective characteristics, and interconnect blocks to define an overall architecture. Integrating the elements together in a single integrated circuit has a number of advantages. Critical circuit specifications such as dynamic range and common mode rejection can be more easily controlled, helping to make circuit performance more predictable and reliable. The input and output characteristics of the programmable analog circuit block allow the block to be used, within an analog routing pool, with other programmable analog circuit blocks to provide more sophisticate analog circuits without significant degradation in performance. The elimination of external passive components and the addition of programmable interconnect structures for the circuit blocks also reduce the sensitivity of circuit designs to board-level variables and tolerances. Moreover, by removing sensitivity to an analog routing pool and facilitating internal modification of function without changing topologic sensitivity to offset and distortion, an integrated circuit can advantageously be provided with multiple programmable analog circuit blocks and an analog routing pool which can accommodate more complex analog functions.
In one realization, certain programmable analog integrated circuits, such as the ispPAC10™ in-system programmable analog integrated circuit from Lattice Semiconductor Corporation, are advantageous in that they arc fully differential from input to output. This improves dynamic range as compared to single-ended input/output (I/O), and affords desirable performance with regard to specified performance characteristics such as power-supply rejection (PSR) and total harmonic distortion (THD). However, to fully exploit the usefulness of the fully differential nature of these programmable analog integrated circuits, and in general any fully differential circuit, other fully differential circuits are needed. For example, many analog circuits utilize a comparator, i.e., a circuit that compares two input voltages, and produces a digital output that is either high or low depending upon the relationship of the two input voltages. Conventional comparators use single-ended inputs for the two input voltages and produce a single-ended output.
Accordingly, a fully differential comparator, where both inputs are differential inputs, for use with fully differential analog circuits, including programmable analog integrated circuits and/or analog circuits comprising discrete components is disclosed in U.S. patent application Ser. No. 09/668,896, Double Differential Comparator and Programmable Analog Block Architecture Using Same, to James L. Goreck and William G. Gazely, assigned to the assignee of this patent application, and hereby incorporated in its entirety for all purposes. That patent application also discloses a digital to analog converter (DAC) circuit with a differential output so as to provide a suitable differential reference voltage for the fully differential comparator, and incorporates fully differential analog circuit components that can be integrated into programmable analog integrated circuits as described above, thereby contributing to the numerous benefits of programmable analog integrated circuits.
Nevertheless, with due recognition to the numerous advantages afforded by devices such as the ispPAC10™ analog integrated circuit, as well as to the fully differential operation enabled by the above-identified patent application, there remain situations in which a differential input, single-ended output architecture represents a more nearly optimal configuration, given, inter alia, compatibility, interoperability and performance considerations. In particular, an analog device that accommodates a differential, current-mode input and that provides a single-ended, voltage-mode output would be especially appreciated. In addition, it is desirable, if not necessary, to provide a technique for performing calibration of a differential-input, single-ended output amplifier, inasmuch as techniques applicable to fully differential configuration appear unavailing. Furthermore, a device that offers additional programmable features by which a user might control and select between modes of operation would add value, as will as flexibility, to circuits and systems into which the programmable analog device is incorporated. For example, a gain stage that is capable of operation, under program control, as a linear amplifier, a comparator, and an integrator would satisfy an as yet unmet need.
SUMMARY
The above and other objects, advantages and capabilities are achieved in one aspect of the invention by a programmable gain stage that includes an amplifier having a differential, current-mode input and a single-ended voltage-mode output, a first programmable feedback network coupled between the amplifier input and a reference potential (GND), a second programmable feedback network coupled between the amplifier input and the amplifier output, a mode control input for receiving a mode control signal that determines the mode of operation of the gain stage, and a mode switch coupled to the amplifier input, to the first feedback network, and to the second feedback network.
As a method of selecting the mode of operation of a programmable gain-stage that includes an amplifier having a differential input and a single-ended output, a feedback network that includes a feedback resistance and a programmable capacitance, a mode-control input, a mode control switch coupled to the mode control input, the amplifier input, and the feedback network, and a CAPCNTRL input, the invention, in a second aspect, comprises: applying a mode-control signal to the mode-control input, distributing a signal derived from the mode-control signal to the mode-control switch, and applying a CAPCNTRL signal to the CAPCNTRL input, the CAPCNTRL signal corresponding t

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