Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Patent
1992-09-02
1994-02-01
Weldon, Ulysses
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
307475, 307270, 307585, 345211, G09G 336, H03K 301
Patent
active
052835650
ABSTRACT:
A multimode input circuit comprises a input terminal, first outputting circuit including a buffer circuit, for receiving a first signal having a first amplitude variation via the input terminal and outputting the first signal of a preset potential; second outputting circuit for receiving a second signal having a second amplitude variation different from the first amplitude variation via the input terminal and outputting a third signal of a preset potential, the second outputting circuit including a power source supplying terminal for supplying the same potential as the maximum potential of the second signal, a first FET having a source connected to said power source supplying terminal, a gate supplied with a selection signal for specifying one of the input signals to be selected by the multimode input circuit and a drain, and a second FET formed to make a complementary structure together with the first FET and having a drain connected to the drain of the first FET, a gate connected to the input terminal and a source connected to a circuit ground, and selecting circuit for receiving the first and third signals from the first and second outputting circuit and a selection signal from the exterior and selecting and outputting one of the first and third signals according to the state of the selection signal.
REFERENCES:
patent: 4070600 (1978-01-01), Butler et al.
patent: 5165046 (1992-11-01), Hesson
Abe Isao
Suzuki Satoshi
Farnandez Kara
Kabushiki Kaisha Toshiba
Weldon Ulysses
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