Multiloop synthesizer with optimal spurious performance

Details Multiloop synthesizer with optimal spurious performance Multiloop synthesizer with optimal spurious performance

1989-11-20

1991-02-19

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Plural oscillators controlled

331 25, 331 30, H03L 707, H03L 718

Patent

active

049947621

ABSTRACT:
An improved mixed down synthesizer scheme 10 having a first phase locked loop 12 and a second phase locked loop 14 provides a first frequency and a second frequency respectively. The first phase locked loop 12 has at least a first programmably tunable filter 30 and a mixer 28. The second phase locked loop 14 has an output received by the mixer 28 in the first phase locked loop 12. A controlling means (18 and 20) controls the first and second frequencies and tunes the first programmably tunable filter 30. The first and the second phase locked loops 12 and 14 are programmed to maintain a constant frequency ratio between the first and second frequencies in order to maintain a minimum frequency offset from the mixed-in spurious products.

REFERENCES:
patent: 3588732 (1971-06-01), Tollefson
patent: 4186356 (1980-01-01), Remy
patent: 4225830 (1980-09-01), Remy
patent: 4331932 (1982-05-01), Remy
patent: 4551689 (1985-11-01), Scala et al.
patent: 4763083 (1988-08-01), Edwards

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