Multilevel phase-change memory element and operating method

Details Multilevel phase-change memory element and operating method Multilevel phase-change memory element and operating method

2007-08-07

2007-08-07

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Multiple values

C365S163000

Reexamination Certificate

active

11182783

ABSTRACT:
A multilevel phase change memory element and operating method and electrodes, which are configured in a parallel structure to form a memory cell. A voltage-drive mode is employed to control and drive the memory element such that multilevel memory states may be achieved by imposing different voltage levels. The provided multilevel phase-change memory element has more bits and higher capacity than that of a memory element with a single phase-change layer.

REFERENCES:
patent: 6141241 (2000-10-01), Ovshinsky et al.
patent: 6339544 (2002-01-01), Chiang et al.
patent: 6635914 (2003-10-01), Kozicki et al.
patent: 7106623 (2006-09-01), Hung et al.
patent: 2005/0191804 (2005-09-01), Lai et al.
patent: 2006/0077741 (2006-04-01), Wang et al.
patent: 2006/0091374 (2006-05-01), Yoon et al.
patent: 2006/0097239 (2006-05-01), Hsiung
patent: 2006/0166455 (2006-07-01), Gordon et al.
patent: 2006/0226411 (2006-10-01), Lee
Ed Spall, Ovonyx, “Ovonic Unified Memory,” Presentation to IEEE Electron Device Society, May 22, 2001.

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