Multilevel non-volatile memory devices

Details Multilevel non-volatile memory devices Multilevel non-volatile memory devices

1997-08-22

1999-12-07

Nelms, David

Static information storage and retrieval

Floating gate

Multiple values

36518522, 36518907, G11C 1134

Patent

active

059994452

ABSTRACT:
In a storage device of the multi-level type, comprising a plurality of memory cells addressable through an address input each cell being adapted for storing more than one binary information element in a MOS transistor which has a control gate, and a floating gate for storing electrons to modify the threshold voltage of the transistor, and comprising a circuit enabling a Direct Memory Access (DMA) mode for directly accessing the memory cells from outside the device, the memory cells are programmed in the direct memory access mode by controlling, from outside the device, the amount of charge stored into the floating gate of each transistor.

REFERENCES:
patent: 5262984 (1993-11-01), Noguchi et al.
patent: 5638323 (1997-06-01), Itano
patent: 5721701 (1998-02-01), Ikebe et al.
patent: 5796625 (1998-08-01), Takeshima et al.

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