Multilevel interrupt handling apparatus

Details Multilevel interrupt handling apparatus Multilevel interrupt handling apparatus

1979-11-02

1981-11-24

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 304

Patent

active

043028080

ABSTRACT:
An interrupt handling apparatus for a data processing system comprising a plurality of processing units and a working memory to which the units may access through a common bus by means of multilevel priority or access requests.
Access requests are forwarded by each unit to a bus access controller preferably made part of the working memory through a single lead for each unit, irrespective of the access request priority level; and if the priority level of an access request is high, a high priority level access request signal is distributed by the high priority level interrupting unit to the other system units, which mask their possible access request of a lower priority level in response to such signal.
The bus access controller grants access to a unit at a time on a priority basis determined by a priority network in the controller totally insensitive to any priority level difference of the access requests.

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