Multilevel integrated circuits employing fused oxide layers

Details Multilevel integrated circuits employing fused oxide layers Multilevel integrated circuits employing fused oxide layers

1986-06-27

1989-05-09

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437915, 437 84, 437208, 437984, 437974, 148DIG135, 148DIG164, 156657, 156633, 357 75, H01L 2170, H01L 2700

Patent

active

048290181

ABSTRACT:
A multilevel semiconductor integrated circuit is fabricated by providing a plurality of substrates having an epitaxial layer on one surface and a silicon oxide layer on the surface of the epitaxial layer. The substrates are sequentially stacked with the silicon oxide layers in contact and fused together. One substrate is retained as a support, and other substrates are removed by etching after the fusion of the silicon oxide layers, thereby leaving only the stacked epitaxial layers separated by silicon oxide. The stacked structure facilitates the vertical fabrication of CMOS transistor pairs sharing a common gate electrode in an epitaxial layer between the two transistors. Electrical isolation between the epitaxial layers is provided by the fused silicon oxide or by removing the silicon oxide and some of the silicon thereby forming a void between adjacent epitaxial layers. Circuit devices in the plurality of epitaxial layers are readily interconnected by forming conductive vias between the epitaxial layers.

REFERENCES:
patent: 3508980 (1970-04-01), Jackson, Jr. et al.
patent: 3564358 (1971-02-01), Hahnlein
patent: 3959045 (1976-05-01), Antypas
patent: 3997381 (1976-12-01), Wanlass
patent: 4009057 (1977-02-01), de Brebisson et al.
patent: 4142925 (1979-03-01), King et al.
patent: 4169000 (1979-09-01), Riseman
patent: 4309811 (1982-01-01), Calhoun
patent: 4601779 (1986-07-01), Abernathey et al.
patent: 4612083 (1986-09-01), Yasumoto et al.
patent: 4638552 (1987-01-01), Shimbo et al.
patent: 4649627 (1987-03-01), Abernathey et al.
Ghandhi, VLSI Fabrication Principles, John Wiley and Sons, Inc., 1983.

Affiliated with

Also associated with

Rating

Multilevel integrated circuits employing fused oxide layers does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multilevel integrated circuits employing fused oxide layers, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilevel integrated circuits employing fused oxide layers will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-89954