Coded data generation or conversion – Analog to or from digital conversion – Analog to digital conversion
Patent
1989-06-16
1993-01-05
Pellinen, A. D.
Coded data generation or conversion
Analog to or from digital conversion
Analog to digital conversion
364579, H03M 136, G05B 2302
Patent
active
051774836
ABSTRACT:
A logic analyzer is provided with probes (20) deriving the signals to be tested which are introduced into a digitizer (22) provided with comparators which carry out a digitization according to a logic system having two states. It comprises a change-over circuit (21) arranged between the probe and the digitizer, which permits associating several or all comparators with a given signal to be tested to extend its digitization to a multi-level logic system. The change-over circuit (21) is constituted by a matrix of MOS transfer gates or field effect transistors (FET's). When the multi-level logic system has at least one medium state limited by two references, the medium state is displayed on a display device (24) according to a straight line or a monotonic curve joining the two references between the beginning and the end of the medium state. When the duration of the medium state exceeds a predetermined duration, the display device (24) is switched on to display the medium state.
REFERENCES:
patent: 4243976 (1981-01-01), Warner et al.
patent: 4373152 (1983-02-01), Jacobsthal
patent: 4493044 (1988-01-01), Hoeren et al.
patent: 4549165 (1985-10-01), Brian
patent: 4602374 (1986-07-01), Nakamura et al.
patent: 4803423 (1989-02-01), Boutigny
French search report in corresponding application, French Serial No. 88-08144.
Zellmer et al, "A Modular Logic Timing Analyzer for the 64000 System", Hewlett-Packard Journal, Mar. 1983, pp. 23-30.
"The Diagnostic Probe System", IBM Tech. Discl. Bull, vol. 30, No. 2, Jul. 1987, pp. 547-548.
Boutigny Pierre-Henri
Nguyen Huy A.
Raoulx Denis
Barschall Anne E.
Hoff Marc S.
Pellinen A. D.
U.S. Philips Corporation
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