Multilayered wiring board with wiring configurations to reduce c

Details Multilayered wiring board with wiring configurations to reduce c Multilayered wiring board with wiring configurations to reduce c

1993-04-19

1994-09-20

Ryan, Patrick J.

Stock material or miscellaneous articles

Structurally defined web or sheet

Discontinuous or differential coating, impregnation or bond

428901, 428457, 361748, 361751, B32B 900

Patent

active

053487923

ABSTRACT:
This multilayered wiring board having a multilayered wiring structure includes a first mesh wiring layer having a plurality of holes therein, and a second wiring layer having a plurality of wirings. The wirings of the second wiring layer undulate up and down so as to descend towards the holes formed in the first wiring layer. In another arrangement, the first wiring layer has a plurality of protrusions protruding toward the second wiring layer at locations between adjacent ones of the wirings of the second wiring layer. In these wiring boards, crosstalk between the wirings is suppressed.

REFERENCES:
patent: 4801489 (1989-01-01), Nakagawa
patent: 4907127 (1990-03-01), Lee
Patent Abstracts of Japan, vol. 11, No. 17 (E-471) Jan. 17, 1987.
Patent Abstracts of Japan, vol. 14, No. 216 (E-924) May 8, 1990.
Patent Abstracts of Japan, vol. 15, No. 390 (E-1118) Oct. 3, 1991.
John Shurboff, "Polyimide Dielectric on Hybrid Multilayer Circuits", 1983 IEEE, pp. 610-615.
Moriya et al., "High-Density Multilayer Interconnection with Photo-Sensitive Polyimide Dielectric and Electroplating Conductor", 1984 IEEE, pp. 82-87.
Kimijima et al., "High-Density Multichip Module by Chip-On-Water Technology", ISHM 1988 Proceedings, pp. 314-319.
Scarlett, "Multilayer Printed Circuit Board Handbook", pp. 530-569, 1985.

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