Coating processes – Electrical product produced – Wire conductor
Reexamination Certificate
2007-10-23
2007-10-23
Talbot, Brian K. (Department: 1762)
Coating processes
Electrical product produced
Wire conductor
C427S097100, C427S097300, C427S098400, C427S123000, C427S265000, C427S383100
Reexamination Certificate
active
10417398
ABSTRACT:
A method of producing a multilayered wiring board having at least two wiring layers (wiring patterns17, 31), polyamide22(an interlayer insulation film) between the wiring layers, and an interlayer conducting post (a conductor post)18for conducting between the wiring pattern17and the wiring pattern31,wherein the polyimide22is disposed around the interlayer conducting post18using a liquid drop discharge system.
REFERENCES:
patent: 4668533 (1987-05-01), Miller
patent: 4791239 (1988-12-01), Shirahata et al.
patent: 5082718 (1992-01-01), Chantraine et al.
patent: 5124781 (1992-06-01), Tashiro
patent: 5200026 (1993-04-01), Okabe
patent: 5594652 (1997-01-01), Penn et al.
patent: 5650199 (1997-07-01), Chang et al.
patent: 5948533 (1999-09-01), Gallagher et al.
patent: 6010769 (2000-01-01), Sasaoka et al.
patent: 6261941 (2001-07-01), Li et al.
patent: 6487774 (2002-12-01), Nakao et al.
patent: 6503831 (2003-01-01), Speakman
patent: 6707153 (2004-03-01), Kuwabara et al.
patent: 6753033 (2004-06-01), Hashimoto et al.
patent: 7202155 (2007-04-01), Fukuchi
patent: 2001/0029665 (2001-10-01), Hashimoto et al.
patent: 2002/0008320 (2002-01-01), Kuwabara et al.
patent: 2003/0185971 (2003-10-01), Saksa et al.
patent: 2004/0145858 (2004-07-01), Sakurada
patent: 07-040445 (1995-02-01), None
patent: 07-231154 (1995-08-01), None
patent: 10-326559 (1998-12-01), None
patent: 11-054928 (1999-02-01), None
patent: 11-163499 (1999-06-01), None
patent: 11-274671 (1999-10-01), None
patent: 11-274681 (1999-10-01), None
patent: 2000-294930 (2000-10-01), None
patent: 2001-267308 (2001-09-01), None
patent: 2001-267725 (2001-09-01), None
patent: WO 01/71805 (2001-09-01), None
Communication from Japanese Patent Office regarding related application.
Furusawa Masahiro
Hashimoto Takashi
Ishida Masaya
Kurosawa Hirofumi
Harness & Dickey & Pierce P.L.C.
Seiko Epson Corporation
Talbot Brian K.
LandOfFree
Multilayered wiring board, method of producing multilayered... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multilayered wiring board, method of producing multilayered..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilayered wiring board, method of producing multilayered... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3901508