Abrading – Flexible-member tool – per se – Comprising fibers
Reexamination Certificate
2000-06-23
2002-05-07
Eley, Timothy V. (Department: 3723)
Abrading
Flexible-member tool, per se
Comprising fibers
C451S533000
Reexamination Certificate
active
06383066
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to polishing pads. The polishing pads of the present invention are especially useful in chemical-mechanical planarization of semiconductor wafers. Specifically the invention relates to pads of increased stiffness to prevent over polishing. The present invention is also applicable to the polishing of other surfaces for example optical glass and CRT and flat panel display screens. The present invention further relates to methods for fabricating the pads and processes using them.
BACKGROUND OF INVENTION
For many years, optical lenses and semiconductor wafers have been polished by chemical-mechanical means. More recently, this technique has been applied as a means of planarizing intermetal dielectric layers of silicon dioxide and for removing portions of conductive layers within integrated circuit devices as they are fabricated on various substrates. For example, a conformal layer of silicon dioxide may cover a metal interconnect such that the upper surface of the layer is characterized by a series of non-planar steps corresponding in height and width to the underlying metal interconnects.
The rapid advances in semiconductor technology has seen the advent of very large scale integration (VLSI) and ultra large scale integration (ULSI) circuits resulting in the packing of very many more devices in smaller areas in a semiconductor substrate. The greater device densities require greater degrees of planarity to permit the higher resolution lithographic processes required to form the greater number of devices having smaller features incorporated in current designs. Moreover, copper, because of its low resistance, is increasingly being used as interconnects. Conventionally, etching techniques are used to planarize conductive (metal) and insulator surfaces. However, certain metals, desirable for their advantageous properties when used as interconnects (Au, Ag, Cu) are nor readily amenable to etching, thus the need for chemical-mechanical polishing (CMP).
Typically, the various metal interconnects are formed through lithographic or damascene processes. The darnascene technique is described in U.S. Pat. No. 4,789,648, Chow, et al. assigned to the assignee of the present invention, disclosure of which is incorporated herein by reference. For example, in a lithographic process, a first blanket metal layer is deposited on a first insulating layer, following which, electrical lines are formed by subtractive etching through a first mask. A second insulating layer over the first metallized layer, and holes are patterned into the second insulating layer using a second mask. Metal columns or plugs are formed by filling the holes with metal. A second blanket metal layer is formed over the second insulating layer, the plugs electrically connecting the first and second metal layers. The second metal layer is masked and etched to form a second set of electrical lines. This process is repeated as required to generate the desired device.
Presently, VLSI uses aluminum for the wiring and tungsten for the plugs because of their susceptibility to etching. However, the resistivity of copper is superior to either aluminum or tungsten, making its use desirable, but copper does not have desirable properties with respect to etching.
Variations in the heights of the upper surface of the intermetal dielectric layer have several undesirable characteristics. The optical resolution of subsequent photolithographic processing steps may be degraded by non-planar dielectric surfaces. Loss of optical resolution lowers the resolution at which lines may be printed. Moreover, where the step height is large, the coverage of a second metal layer over the dielectric layer may be incomplete, leading to open circuits.
In view of these problems, methods have been evolved to planarize the upper surfaces of the metal and dielectric layers. One such technique is chemical-mechanical polishing (CMP) using an abrasive polishing agent worked by a rotating pad. A chemical-mechanical polishing method is described in U.S. Pat. No. 4,944,836, Beyer, et al., assigned to the assignee of the present invention, disclosure of which is incorporated herein by reference. Conventional polishing pads are made of a uniform material, such as polyurethane, or may be laminated with variations of physical properties throughout the thickness of the pad.
The CMP art combines the chemical conversion of the surface layer to be removed, with the mechanical removal of the conversion product. Ideally, the conversion product is soft, facilitating high polishing rates. CMP pads must resolve two constraints relevant to the present invention. The surface in contact with the substrate to be polished must be resilient. Of particular relevance to the present invention is the problem of local over polishing, also known as “dishing.” This is one of the key problems encountered during CMP of metal substrates. It is generally known that prevention of dishing requires a stiffer pad. However, associated with stiffer pads is the tendency towards increased number and density of surface scratches and defects. Such defects correlate with low yields of product.
Currently, these problems are handled using multi-step techniques wherein initial polishing is effected at a high rate using one set of pads and abrasive compounds, followed by a second polishing step using a second set of pads and abrasive compounds differently optimized in comparison to the first set. This is a time consuming process and, moreover, it also suffers from high defect densities due to the use of two different pads. For Cu planarization, CMP pads are critical, and are as important as the abrasive slurry. The prior art was a single-layered pad that was either too stiff or too soft to obtain good planarization.
Stacked nonwoven and other types of pads have previously been tried in an attempt to obtain better CMP performance. However, thin (5 to 15 mil thick) fibrous pads are not sufficiently durable and do not survive the CMP process.
Accordingly, the need exists for improved polishing pads.
SUMMARY OF INVENTION
The present invention addresses problems in the prior art and provides a multiple-layer pad comprising one or more stiff layers supporting a soft polishing layer. Applications are envisioned in the semiconductor and optical industries.
The invention provides a pad having one, or more, first layers comprising first fibers in a matrix and one or more second layers comprising second and different fibers embedded in a matrix and acting as the polishing layer. The composition of the first fibers and matrix is stiffer than the composition of the second fibers and matrix.
The present invention also relates to a method of using the above disclosed pads. In particular, the method comprises contacting the surface to be polished with the above disclosed polishing pad.
The present invention provides a method for making the pads. The method comprises providing a structure of at least one first layer of first fibers and at least second layer of second and different fibers. A curable polymeric composition is applied to the above structure and then heat and pressure are applied to cure the polymeric composition.
Still other objects and advantages of the present invention will become readily apparent by those skilled in the art from the following detailed description, wherein it is shown and described preferred embodiments of the invention, simply by way of illustration of the best mode contemplated of carrying out the invention. As will be realized the invention is capable of other and different embodiments, and its several details are capable of modifications in various obvious respects, without departing from the invention. Accordingly, the description is to be regarded as illustrative in nature and not as restrictive.
REFERENCES:
patent: 5876269 (1999-03-01), Torii
patent: 5876490 (1999-03-01), Ronay
patent: 5968280 (1999-10-01), Ronay
patent: 5984769 (1999-11-01), Bennett et al.
patent: 5989111 (1999-11-01), Lamphere et al.
patent: 6051496 (2000-04-01), Jang
pat
Chen Shyng-Tsong
Chi Hsu Oscar Kai
Chung Alex Siu Keung
Rodbell Kenneth P.
Vangsness Jean
Connolly Bove & Lodge & Hutz LLP
Eley Timothy V.
International Business Machines - Corporation
Nguyen Dung Van
Trepp, Esq. Robert M.
LandOfFree
Multilayered polishing pad, method for fabricating, and use... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multilayered polishing pad, method for fabricating, and use..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilayered polishing pad, method for fabricating, and use... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2893198