Multilayered interconnection substrate having a resin wall forme

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum

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257759, 257774, 257637, 257643, H01L 2358

Patent

active

056169604

ABSTRACT:
A multilayered interconnection substrate which prevents contact failure from occurring and a process for fabricating the same, said multilayered interconnection substrate comprising a first interconnection layer formed on a substrate, at least two layers of insulation films differing in composition from each other and being formed on said first interconnection layer, provided that the insulation layers comprise at least one contact hole formed in such a manner to expose the selected portion of said first interconnection layer, a resin wall which buries the stepped portions formed on the inner peripheral portion of said contact hole, and a second interconnection layer formed inside said contact hole along said resin wall and being electrically connected to the first interconnection layer exposed at the bottom portion of the contact hole.

REFERENCES:
patent: 5117273 (1992-05-01), Stark et al.
patent: 5138424 (1992-08-01), Moss et al.
patent: 5408130 (1995-04-01), Woo et al.

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