Multilayered circuit board for semiconductor chip module,...

Details Multilayered circuit board for semiconductor chip module,... Multilayered circuit board for semiconductor chip module,...

1999-09-15

2003-04-29

Talbott, David L. (Department: 2827)

Electricity: conductors and insulators

Conduits, cables or conductors

Preformed panel circuit arrangement

C174S262000

Reexamination Certificate

active

06555763

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a multilayered circuit board for a semiconductor chip module and, more particularly, to a multilayered circuit board for a semiconductor chip module suitable for high-density wiring.
Recently in a multilayered circuit board for a semiconductor chip module, the semiconductor chip module having a plurality of IC chips is mounted on the die pad of a lead frame. The electrodes between the IC chips mounted on the lead frame and the multilayered circuit board, the lead frame, and the semiconductor chip module board are electrically connected by bumps or wire bonding.
The mainstream of such multilayered circuit boards is a resin-layered board prepared by forming a thin-film multilayered circuit of copper and polyimide on an underlying board of ceramics or the like.
FIGS. 7A and 7B
show an example of a conventional multilayered circuit board for a semiconductor chip module.
FIG. 7A
shows the whole structure, and
FIG. 7B
shows a section taken along the line A—A in FIG.
7
A.
As shown in
FIG. 7A
, a semiconductor chip
9
and chip component
8
are mounted on a conventional multilayered circuit board
11
for a semiconductor chip module. The semiconductor chip
9
and chip component
8
are connected by bonding wires
10
, GND wiring layers
14
on the board surface, and metallized portions
12
at the board edge to the GND terminal (not shown) of a motherboard on which the multilayered circuit board
11
is mounted.
In the conventional board structure, a current to the GND terminal flows from the semiconductor chip
9
to the GND terminal of the motherboard through the bonding wire
10
, chip component
8
, GND wiring layer
14
, metallized portion
12
, and lead wire
13
, as indicated by the arrows in FIG.
7
B. The metallized portion
12
which passes a current to the GND terminal is formed at the peripheral portion of the multilayered circuit board
11
. The GND wiring layer
14
must be extended to the metallized portion
12
at the peripheral portion, which prolongs the GND wiring layer
14
.
In the conventional multilayered circuit board for a semiconductor chip module, the long GND wiring layer increases the resistance and impedance of the GND wiring layer, and a potential higher than the correct GND potential is undesirably supplied to the semiconductor chip. The long GND wiring layer also increases power consumption.
SUMMARY OF THE INVENTION
It is, therefore, a principal object of the present invention to shorten the GND wiring layer of a multilayered circuit board for a semiconductor chip module suitably for high-density wiring.
To achieve the above object, according to the present invention, there is provided a multilayered circuit board for a semiconductor chip module, comprising an underlying board having a major surface made of a metal material to which a fixed potential is applied, insulating layers which are stacked on the major surface of the underlying board and have wiring layers formed on surfaces of the insulating layers, fixed-potential wiring layers constituting part of the wiring layers formed on the insulating layers, via holes formed below the fixed-potential wiring layers to extend through the insulating layers, and metal layers filled in the via holes so as to make upper ends be connected to lower surfaces of the fixed-potential wiring layers, wherein one of the insulating layers in contact with the major surface of the underlying board is formed on the underlying board while a lower end of the metal layer is in contact with the major surface of the underlying board, and the other insulating layer formed on the insulating layer in contact with the major surface of the underlying board is stacked while a lower end of the metal layer is in contact with an upper surface of the fixed-potential wiring layer of the one insulating layer.


REFERENCES:
patent: 5396397 (1995-03-01), McClanahan et al.
patent: 5517751 (1996-05-01), Bross et al.
patent: 6156980 (2000-12-01), Peugh et al.
patent: 6-318668 (1994-11-01), None
patent: 6-318669 (1994-11-01), None
patent: 7-86736 (1995-03-01), None
patent: 8-306820 (1996-11-01), None
Japanese Office Action, dated Jun. 27, 2000, with partial English translation.

Affiliated with

Also associated with

Rating

Multilayered circuit board for semiconductor chip module,... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multilayered circuit board for semiconductor chip module,..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilayered circuit board for semiconductor chip module,... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3019208