Multilayered chip capacitor array

Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor

Reexamination Certificate

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C361S312000

Reexamination Certificate

active

07149072

ABSTRACT:
Disclosed herein is a multilayered chip capacitor array, including a capacitor body having a plurality of dielectric layers, a plurality of pairs of first and second inner electrodes which are formed on the plurality of dielectric layers such that one electrode of one pair of inner electrodes faces the other electrode of the one pair of inner electrodes with one of the plurality of dielectric layers interposed therebetween, at least one first outer terminal and a plurality of second outer terminals formed on at least one surface of a top surface and a bottom surface of the capacitor body, and at least one first conductive via and a plurality of second conductive vias formed in a stacking direction of the capacitor body and connected to the first outer terminal and the second outer terminal, respectively.

REFERENCES:
patent: 5880925 (1999-03-01), DuPré et al.
patent: 6344961 (2002-02-01), Naito et al.
patent: 6370010 (2002-04-01), Kuroda et al.
patent: 6407907 (2002-06-01), Ahiko et al.
patent: 6496354 (2002-12-01), Naito et al.
patent: 6532143 (2003-03-01), Figueroa et al.
patent: 6961231 (2005-11-01), Alexander et al.
patent: 2005/0007723 (2005-01-01), Mosley
patent: 10-2001-39561 (2001-05-01), None
patent: 10-2001-49257 (2001-06-01), None

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