Multilayer wiring board and manufacture method thereof

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings

Reexamination Certificate

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C257S703000

Reexamination Certificate

active

07091589

ABSTRACT:
In a multilayer wiring board comprising a core board, and a wiring layer and an electrically insulating layer that are stacked on one surface of said core board, a thermal expansion coefficient of said core board in XY directions falls within a range of 2 to 20 ppm, a core member for said core board is a core member selected from silicon, ceramics, glass, a glass-epoxy composite, and metal, said core board is provided with a plurality of through holes that are made conductive between the front and the back by a conductive material, and a capacitor is provided on one surface of said core board, wherein said capacitor comprises an upper electrode being the conductive material in said through hole, and a lower electrode disposed so as to confront said upper electrode via a dielectric layer.

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patent: 6465084 (2002-10-01), Curcio et al.
patent: 2001/0032700 (2001-10-01), Nishii et al.
patent: 2002/0159243 (2002-10-01), Ogawa et al.
patent: 7-030225 (1995-01-01), None
patent: 9-283884 (1997-10-01), None
patent: 11-340226 (1999-12-01), None
patent: 2000-165052 (2000-06-01), None
patent: 2001-015928 (2001-01-01), None
patent: 2001-257474 (2001-09-01), None
patent: 2002-141626 (2002-05-01), None

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