Wave transmission lines and networks – Long line elements and components – Strip type
Reexamination Certificate
2002-06-27
2004-05-04
Le, Don P (Department: 2819)
Wave transmission lines and networks
Long line elements and components
Strip type
C257SE21585, C257SE23174
Reexamination Certificate
active
06731189
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATIONS
Not applicable.
STATEMENTS REGARDING FEDERALLY SPONSORED RESEARCH
Not applicable.
FIELD OF THE INVENTION
This invention relates generally to radar system circuits and communications systems circuits and, more particularly, to multi-layer stripline radio frequency (RF) circuits and interconnection methods.
BACKGROUND OF THE INVENTION
As is known in the art, a radar or communications system generally includes a transmitter, a receiver, and an antenna having a feed circuit with at least one conductive member generally referred to as a reflector, radiator or antenna element. As is also known, an array antenna can include a plurality of sub-assemblies having phase-shifting elements and transmit/receive (T/R) elements disposed in an array having multiple layers interconnected to provide modules. RF signals can be phase-shifted and received or transmitted using the same radiator.
To enable the transmission of RF signals between the active T/R modules and the radiators, radar and communications systems utilize a plurality of RF transmission line circuits (also referred to as stripline circuits) which couple transmitted and received signals between the radiators and the active transmit/receive modules. The RF stripline circuits are conventionally provided as multiple layers of RF circuit boards that are stacked and bonded together for mechanical support and include RF transmission lines physically interconnected with plated vias. The interconnection of sub-assemblies is required because of restrictions in drilling and plating “blind” vias (i.e., vias interconnecting stripline circuits that extend only partially into a multilayer laminate).
Conventional approaches to interconnecting stripline circuits are limited by relatively tight process tolerances such that the number of laminated circuit board layers that can be interconnected is limited. A first known approach to interconnect circuits is to solder individual RF circuit boards together. This approach attempts to make the interconnection between pairs of via pads and between ground planes on each of two circuit boards. The reliability of soldering via pads is limited because the solder flow is difficult to control. Short circuits are sometimes caused by the solder bridging a relief area between a via and the ground plane. Open circuits sometimes result from a lack of solder (also referred to as solder starvation) connecting the via pads and the interconnection to other circuit elements. These reliability problems result from process parameters which are difficult to control.
Conventional soldering techniques require the fine tuning of multiple process parameters such as: solder volume, solder composition (i.e. the tin-lead (SnPb) percent composition), solder flow, bonding temperature and pressure, and circuit board flatness. Furthermore, solder joints are susceptible to failure due to fatigue from temperature cycling in an operating environment.
Excess solder volume can cause short circuits if not tightly controlled. If there is too much solder between via pads, the risk of shorting the via to ground is increased. A lack of adequate solder volume increases the risk that the area between via pads will be starved of solder causing an open circuit or poor RF transition. Solder composition controls the tensile strength and melting point of the solder. For example, a higher percentage (e.g., 90%) of lead results in more malleable solder (i.e., less brittle and less sensitive to cracking) but significantly increases the melting point (e.g., from 275 to 302° C.). The higher melting point requires higher temperatures to be used in stripline sub-assembly fabrication. Conversely, higher percentage (e.g., 90%) tin composition results in higher tensile strength (but more brittleness) and lower melting point (e.g., 183-210° C.). Moreover, the limited range of usable melting points restricts the number of times an assembly can be processed. Each sequential processing step must be performed at a relatively lower temperature in order to avoid re-melting solder from a previous step. This limitation restricts the number of RF circuits that can be reliably interconnected in a sub-assembly and, therefore, limits the functionality of the radar system antenna or communications system antenna.
The difficulty in controlling board flatness exacerbates soldering process problems because no two boards to be interconnected are perfectly flat. Soldering limitations require two Printed Wiring Boards (PWBs) to be flat and parallel within, e.g., 0.003″-0.004″, in order to assure the solder will bridge the gap between connections on the boards to be interconnected. Providing boards having a flatness within 0.003″-0.004″ requires relatively demanding tolerances during the design and fabrication of the PWBs. Some of the flatness limitations can be resolved by soldering the PWBs together in a press, but higher pressures result in more solder flow. This additional solder flow can cause shorting between signal pads and ground planes. Bonding temperature affects solder flow and also requires precise control of the time-temperature profile. For example, there must be a steep rate of temperature decline after the solder transitions from a solid to a liquid. Otherwise, the tin in the solder will oxidize, which weakens the solder joint.
In another conventional approach, referred to as the pin approach, pins are soldered into vias. This approach attempts to mitigate difficulties due to board flatness limitations by using pins to bridge the gap between vias to provide interconnection. Pins are soldered or bonded into vias on one PWB. Then, as the PWBs are assembled, the pins fit into matching vias on the opposite PWB to connect the RF circuits. Pin approach reliability is reduced by the same process restrictions noted above for the via pad soldering approach. In addition, the pin approach is exceptionally sensitive to process variances such as pin alignment, pin and via dimensional tolerances, and solder volume because the pin fills most of hole.
Proper pin alignment assures that the pin goes up inside the via of the mating board. Pin and via dimensional tolerances are relatively tight, because via drill size, plating and pin diameter determine whether the pin fits correctly into the via. Vent holes are sometimes required in conventional approaches in order to allow gasses to escape during the soldering process. All of the above mentioned process variances contribute to unpredictable, parasitic circuit reactance that can severely degrade the RF performance of a radar or communications antenna.
In a further conventional approach, so-called Z-axis adhesive films are used to interconnect multiple layers of Polytetrafluoroethylene (PTFE) RF transmission line circuits. This approach requires precise cutting and placement of the adhesive film between via pads. In addition, this approach suffers from mechanically and/or environmentally induced failures due to temperature cycling, humidity, salt fog, etc.
The high cost and limited reliability of many conventional phased array systems has restricted their use across platforms, applications and frequencies. Many military radar and communication systems require high functionality (e.g., multiple beams, multiple frequency bands) combined with lightweight and low-profile tile arrays. Conventional systems have complicated front-ends often incorporating semi-rigid coaxial cables and epoxies. In contrast, tile arrays offer a low cost alternative to producing highly integrated phased arrays. Tile array fabrication is based on a batch process production of multiple board layers and a correspondingly large number of vertical interconnections. In commercial applications, for example “smart antenna arrays” for the cellular phone market, it is often desirable to integrate RF antenna arrays and associated feed circuitry into low cost, low profile, high reliability packaging. From the L-Band through the Ka-Band, radar and commercial wireless applications are pushing higher functional in
Crowder Joseph M.
Dupuis Patricia S.
Fallica Michael C.
Puzella Angelo
Daly, Crowley & Mofford, LLP.
Le Don P
Raytheon Company
LandOfFree
Multilayer stripline radio frequency circuits and... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Multilayer stripline radio frequency circuits and..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilayer stripline radio frequency circuits and... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3221193