Multilayer printed circuit and associated multilayer material

Details Multilayer printed circuit and associated multilayer material Multilayer printed circuit and associated multilayer material

1989-10-16

1993-05-25

Thompson, Gregory D.

Electricity: electrical systems and devices

Miscellaneous

174255, 174258, 174261, 361462, H05K 111

Patent

active

052145719

ABSTRACT:
A multilayer printed circuit, including: first and second layers, each comprising dielectric material, at least one of these layers having an opening therethrough for which the other layer does not have a corresponding opening therethrough, at least one of the layers bearing a conductive path; there being disposed between and bonded to these layers a third layer comprising substantially chemically nonpermeable material to chemically isolate the conductive path against subsequent treatment of the printed circuit; all three layers having corresponding datums formed thereon located for relative mutual alignment of the corresponding features on the layers.

REFERENCES:
patent: 3105869 (1963-10-01), Branch et al.
patent: 3228091 (1966-01-01), Rice et al.
patent: 3409732 (1968-11-01), Dahlgren et al.
patent: 3471348 (1969-10-01), Shaheen et al.
patent: 3772776 (1973-11-01), Weisenburger
patent: 3851382 (1974-12-01), Stork
patent: 3888745 (1975-06-01), Hojyo
patent: 3939558 (1976-02-01), Riley
patent: 3999285 (1976-12-01), Lewis et al.
patent: 4026011 (1977-05-01), Walton
patent: 4037047 (1977-07-01), Taylor
patent: 4063993 (1977-12-01), Burns
patent: 4064622 (1977-12-01), Morris et al.
patent: 4081600 (1978-03-01), Kueneman et al.
patent: 4095866 (1978-06-01), Merrill
patent: 4241436 (1980-12-01), Bolzt et al.
patent: 4268956 (1981-05-01), Parks et al.
patent: 4287014 (1981-09-01), Gaku et al.
patent: 4296457 (1981-10-01), Hahlganss
patent: 4316320 (1982-02-01), Nogawa et al.
patent: 4331740 (1982-05-01), Burns
patent: 4338149 (1982-07-01), Quaschner
patent: 4343083 (1982-08-01), Takemura et al.
patent: 4355463 (1982-10-01), Burns
patent: 4402131 (1983-09-01), Roberts
patent: 4420364 (1983-12-01), Nukii et al.
patent: 4495546 (1985-01-01), Nakamura et al.
patent: 4509095 (1985-04-01), Boros
patent: 4532575 (1985-07-01), Suwa
patent: 4533787 (1985-08-01), Anderegg et al.
patent: 4550357 (1985-10-01), Matsumoto
patent: 4626462 (1986-12-01), Kober et al.
patent: 4664962 (1987-05-01), DesMarais, Jr.
patent: 4668332 (1987-05-01), Ohnuki et al.
patent: 4687695 (1987-08-01), Hamby
patent: 4710854 (1987-12-01), Yamada et al.
patent: 4715928 (1987-12-01), Hamby
patent: 4756940 (1988-07-01), Payne et al.
patent: 4800461 (1989-01-01), Dixon et al.
Ardito et al., Making Integral Multilayer Circuit Boards With Cable Connection.
IBM Tech. Disc. Bull., vol. 14 #3, Aug. 1971, pp. 701 and 702 Kapton.RTM. Polyimide Film; Summary of Properties (DuPont Company, Wilmington, Delaware 1983).

Affiliated with

Also associated with

Rating

Multilayer printed circuit and associated multilayer material does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Multilayer printed circuit and associated multilayer material, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Multilayer printed circuit and associated multilayer material will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-902402