Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Reexamination Certificate
2001-09-24
2004-02-10
Lee, Eddie (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
C257S762000, C257S765000, C257S767000, C257S771000, C257S774000, C257S775000
Reexamination Certificate
active
06690092
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device, and particularly to an improvement in reliability of a multilayer interconnection structure which connects between an upper interconnection and a lower interconnection by a via hole or the like.
2. Description of the Related Art
In a semiconductor process for a multilayer interconnection structure to which a flattening technique is essential, a high-temperature film-forming technique used for aluminum, e.g., a technique for embedding a high melting-point metal like tungsten (W) has been adopted to implement the embedding of a contact hole or via hole. The aluminum high-temperature film-forming technique is one wherein, for example, titanium (Ti) is formed as a reactive layer for increasing fluidity for aluminum after a via hole has been defined in an interlayer insulating film formed over a lower interconnection, and an aluminum alloy with aluminum as a principal component is next formed at a high temperature. According to the high melting-point metal embedding technique, for example, titanium nitride (TiN) is formed as an adhesion layer composed of a high melting-point metal W after a via hole has been defined in an interlayer insulating film formed on a lower interconnection and W is next formed by CVD or the like. Thereafter, tungsten is left within the via hole alone by etchback or the like to form an aluminum alloy as a film. Electromigration in the aluminum alloy and embedded tungsten has been introduced in, for example, the paper:┌Electromigration in two-level interconnect structures with Al alloy lines and W studs (1992 American Institute of Physics. VOL. 72. NO. 1, July 1992)┘, etc.
However, the electromigration in the conventional structure is rate-controlled by interconnections on the high-potential side. When a lower interconnection is biased to negative polarity and an upper interconnection is biased to positive polarity, electrons pass through a via hole so as to move from the lower interconnection to the upper interconnection. As a result, moving start points of aluminum atoms are limited to the via hole and hence aluminum at an end of the upper interconnection on the high-potential side will disappear, thus causing a void. This phenomenon occurs even in a structure wherein no aluminum atoms migrate between an upper interconnection and a lower interconnection as in the high melting-point metal embedded-type structure. However, the phenomenon remarkably occurs in the high melting-point metal embedded-type structure and the life of electromigration becomes extremely short.
When the upper interconnection comprised of the aluminum alloy is formed at a temperature higher than a temperature for allowing aluminum to have fluidity in the multilayer interconnection structure, aluminum atoms move backward more remarkably. Thus, when such a case occurs, the life of electromigration becomes shorter and the allowable current density of each interconnection is less reduced.
SUMMARY OF THE INVENTION
With the foregoing in view, it is therefore an object of the present invention to provide a high-reliable semiconductor device capable of increasing an electromigration life of an upper interconnection electrically connected to a lower interconnection through a via hole.
According to one aspect of this invention, for achieving the above object, there is provided a semiconductor device having a multilayer interconnection structure, comprising:
an upper interconnection, the upper interconnection comprising,
a first metal layer comprised of an aluminum alloy, which is formed over a lower interconnection, and
a second metal layer formed over the first metal layer and comprised of an aluminum alloy formed as a film at a temperature higher than that for the first metal layer.
According to another aspect of this invention, there is provided a semiconductor device having a multilayer interconnection structure, wherein a metal region composed of a metal different from an aluminum alloy is formed in a portion spaced by a predetermined distance in an extending direction of an upper interconnection from an end of a via hole defined in the upper interconnection comprised of an aluminum alloy, which is electrically connected to a lower interconnection through the via hole.
Typical ones of various inventions of the present application have been shown in brief. However, the various inventions of the present application and specific configurations of these inventions will be understood from the following description.
REFERENCES:
patent: 5459353 (1995-10-01), Kanazawa
patent: 5763954 (1998-06-01), Hyakutake
patent: 5895265 (1999-04-01), Inoue et al.
patent: 5-152445 (1993-06-01), None
patent: 405152445 (1993-06-01), None
patent: 9-219381 (1997-08-01), None
patent: 409219381 (1997-08-01), None
C-K Hu et al., “Electromigration in two-level interconnect structures with Al alloy lines and W studs,” J. Appl. Phys. 72(1), Jul. 1, 1992, pp. 291-293.
Lee Eddie
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
Warren Matthew E.
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