Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
1999-03-23
2001-06-05
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C257S700000
Reexamination Certificate
active
06242286
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to electrical circuitry, and, more particularly, to a laminate or module formed of a number of stacked sheets of dielectric material having at least one major surface carrying a pattern of electrically conductive material.
BACKGROUND OF THE INVENTION
Electrical components are commonly mounted on circuit panel structures such as printed circuit boards. Relatively large circuit panels are commonly made of polymeric materials, often with reinforcements such as glass. Very small circuit panels, such as those used to carry micro circuits including semiconductor chip carriers, are typically formed of ceramics, silicone or the like. Circuit panels of this general type have opposed, major flat surfaces, one or both of which mount electrical conductors. The conductors are commonly formed of metallic materials such as copper, noble metals, tungsten or molybdenum which serve to interconnect the electrical components mounted to the board. Where the conductors are carried on both major surfaces of a panel, via filled with electrically conductive material are formed in the dielectric layer(s) to interconnect the conductors on opposite major surfaces.
As electronic circuits have increased in complexity, concerted efforts have been made to miniaturize circuit components and to construct the circuitry in several layers of conductors separated by insulating dielectric layers. Consequently, circuit panels of the type described above have been incorporated in laminates or modules wherein a number of circuit panels are stacked one on top of the other with additional layers of dielectric material separating the conductors on mutually facing surfaces of adjacent panels. Such multilayer assemblies ordinarily incorporate interconnections extending between the components on the various circuit panels in the stack, as necessary, to provide the required electrical interconnections.
One common method for the production of micro electronic circuitry begins with the fabrication of a dielectric substrate known as a “green sheet.” A particulate material usually ceramic, is intermixed with a binder and cast onto a moving belt where a scraper or doctor blade is employed to obtain the desired thickness, e.g., on the order of 200-280 &mgr;m. In subsequent manufacturing steps, the green sheet is cut to size and undergoes a number of processing steps including the formation of registration holes and via. The via are filled with conductive material, and then electrically conductive metal paste is applied in a predetermined pattern on one or both of the major surfaces of the substrate. A number of green sheets are stacked one on top of the other, and the entire assembly is then co-fired or sintered at a temperature typically in the range of about 1250-1560° C. This co-firing operation drives off the organic binders in the green sheets and metal paste, sinters the conductive metal and densities the dielectric material.
A number of serious deficiencies have been observed with the above described fabrication method, and in the resulting micro circuitry itself. The green sheets do not exhibit good strength and are susceptible to breakage during subsequent handling operations such as the drilling or punching of registration holes and via. Consequently, the green sheets must be made relatively thick which substantially increase the overall thickness of the module formed by stacking multiple sheets atop one another. The comparatively low strength of the green sheets also does not lend itself well to finishing operations such as grinding, polishing or the application of a finished material such as glass to the major surfaces of the sheets. Such finishing operations are desirable to avoid surface irregularities in preparation for application of the conductive coating patterns thereon.
As noted above, the green sheets and conductive coating patterns are co fired at elevated temperatures to produce the resulting multilayer micro circuit module. This cofiring operation produces a host of problems in the manufacturing process and severe limitations in the micro circuit module. Both the green sheets, and metallurgy carried on their major surfaces, densify and shrink during the firing operation. Unfortunately, shrinkage of the ceramic material forming the green sheets is often nonuniform, and differs from the shrinkage rate of the metallurgy. Different or nonuniform shrinkage among the individual ceramic sheets can create misalignment of the registration holes and/or via between adjacent sheets. This misalignment of the via, which are filled with conductive material, can result in a failure to make electrical connection between the conductive pattern on one sheet with the conductive pattern on an adjacent sheet, and/or with the conductive pattern on opposite sides of a single sheet. Although enlarging the size of the via to account for shrinkage of the ceramic sheets is an option, this reduces the surface area of the sheet available for the mounting of micro circuitry. A different rate of shrinkage between the ceramic and metallurgy may create cracking in the conductive pattern, or loss of the metal-to-ceramic adhesion.
Firing or sintering of the multilayer module is conducted at elevated temperatures to burn away the binder material contained in the green sheets and in the conductive paste. Burn-out of the binder material can produce impurities which are absorbed within or otherwise contaminate the conductive patterns, thus compromising their integrity. Additionally, the high sintering temperatures severely limits the types of metals which can be employed to form the electrically conductive patterns on the ceramic sheets. High melting point metals such as tungsten or molybdenum must be utilized to withstand the co-firing temperatures, instead of conductive material such as gold, silver, palladium and copper which exhibit lower resistance, enhanced signal propagation and lessened “cross-talk” or noise. Such deficiencies of tungsten and molybdenum limit the densities at which the conductive patterns can be applied to the ceramic sheets.
SUMMARY OF THE INVENTION
It is therefore among the objectives of this invention to provide a method of fabricating multilayer micro circuits which eliminates problems of shrinkage of the dielectric substrates or sheets, which eliminates impurities in the sintering operation, which allows for improved surface finish on the major surfaces of the dielectric sheets, which permits the use of noble metals to form the conductive patterns, which allows for densification of the micro circuitry, and, which protects the micro circuitry from contaminants.
These objectives are accomplished in a method according to this invention which is predicated upon the concept of forming a number of green sheets in a conventional manner, but firing them at the appropriate temperature before any other fabrication operations are conducted. After firing of the green sheets, registration holes and via are formed by ultrasonic, high pressure water jet, isostatic punching or laser techniques. The via are then filled with a conductive metal, after which time a conductive pattern is deposited on one or both of the major surfaces of each sintered sheet using noble metals or copper. The individual sheets are stacked one on top of the other using the registration holes for proper alignment. The exterior surfaces of the entire stack or module are then coated with a glass material, solder or other sealing material to substantially completely encase the conductive patterns on the inside of the stack. Lastly, the entire assembly or module is fired at a temperature sufficient to crystallize the sealing material, but at a temperature below the melting point of the noble metals or copper forming the conductive patterns.
A substantial number of advantages are achieved with the above described method of forming a multilayer micro circuit compared to techniques employed in the past. Many of these advantages are obtained by sintering or firing the green sheets of ceramic material before any other ope
Berezny Nema
Bowers Charles
Holland & Knight LLP
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