Multilayer analog interconnecting line layout for a...

Semiconductor device manufacturing: process – Making passive device – Planar capacitor

Reexamination Certificate

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C438S381000

Reexamination Certificate

active

07109088

ABSTRACT:
A mixed-signal integrated circuit includes a metal-insulator-metal or polysilicon-insulator-polysilicon capacitor. The electrical path from one electrode of the capacitor passes through a first interconnecting line, then through multiple via holes to a second interconnecting line. During the fabrication process, the capacitor is first charged during a plasma deposition process used to deposit an interlayer dielectric film between the first and second interconnecting lines, then abruptly discharged during a plasma etching process that forms the via holes. The discharge does not damage the floors of the via holes, however, because each of the multiple via holes carries only part of the discharge current.

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patent: 2001/0023976 (2001-09-01), Kawata et al.
patent: 2002/0192919 (2002-12-01), Bothra

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