Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
1999-08-20
2004-10-26
Parekh, Nitin (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S686000, C257S723000, C257S737000, C257S738000, C257S774000, C257S780000, C257S778000, C257S621000, C257S758000, C438S667000, C438S672000
Reexamination Certificate
active
06809421
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a multichip semiconductor device using multiple chips.
The present invention also relates to a chip for a multichip semiconductor device and a method of manufacture thereof.
Recent computers and communication equipment use for their important section a large-scale integrated circuit (chip) which has a great number of electronic components, such as transistors, resistors, etc., integrated into a semiconductor substrate. Thus, the performance of the entire equipment depends largely on the performance of the chip.
On the other hand, so-called multichip semiconductor devices have proposed, each having a plurality of chips to improve the whole performance of the equipment.
FIGS. 1
,
2
and
3
are sectional views of conventional multichip semiconductor devices.
FIG. 1
shows a multichip semiconductor device of a type in which a plurality of chips
82
are placed side by side on a multilayered interconnection substrate
81
. Reference numeral
83
denotes a solder bump.
FIG. 2
shows a multichip semiconductor device of a type in which chips are connected together with their major surfaces opposed to each other.
FIG. 3
shows a multichip semiconductor device of a type in which a plurality of chips
82
are stacked using stacking plates
84
.
However, these conventional multichip semiconductor devices have the following problems.
In the multichip semiconductor device shown in
FIG. 1
, the plane area of the device increases because the chips
82
are arranged in the same plane.
The conventional semiconductor device of
FIG. 2
is free of the problem with the device of
FIG. 1
that the plane area of the device increases. This is because the chips
82
are stacked one above another. However, the device of
FIG. 2
has a problem that the number of chips that can be stacked is limited to two. In addition, it is difficult to electrically test each chip.
The conventional semiconductor device of
FIG. 3
does not suffer from the problems with the conventional semiconductor devices of
FIGS. 1 and 2
. However, its structure is complex, its thickness is great, and its manufacturing cost is high. This is because a stacking late
84
need to be provided between any two adjacent two chip.
BRIEF SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a multichip semiconductor device which has a small plane area, a simple structure, and a small thickness.
It is another object of the present invention to provide a chip which makes it possible to implement such a multichip semiconductor device and to provide a method of manufacturing the chip.
According to a first aspect of the present invention, there is provided a multichip semiconductor device having a stack of chips each having a semiconductor substrate which has a surface on which circuit components are formed and an interlayer insulating film formed on the surface of the semiconductor substrate, wherein at least one chip of the chips has a connect plug formed in a through hole which passes through the semiconductor substrate and a part of the interlayer insulating film, and the one chip having the connect plug is electrically connected with a another chip of the chips by the connect plug.
For example, the interlayer insulating film is a interlayer insulating film of a first layer covered with the circuit component.
According t o a second aspect of the invention, there is provided a multiple semiconductor device according to the first aspect, in which the another chip has a connect member that electrically connects with the connect plug, and the connect member is, for example, a metal bump.
According to third aspect of the invention, there is provided a multiple semiconductor device according to the first aspect, wherein the one chip and the another chip are electrically connected with each other through a packing member. The packing member is an interconnecting substrate or TAB tape.
According to a fourth aspect of the present invention, there is provided a chip for use in a multichip semiconductor device, comprising:
a semiconductor substrate having a surface on which circuit components are formed;
an interlayer insulating film formed on the surface of the semiconductor substrate; and
a connect plug made of a metal formed in a through hole that passes through a part of the interlayer insulating film and the semiconductor substrate and adapted to provide an electrical connection for another chip.
According to a fifth aspect of the invention, there is provided a chip according to the fourth aspect, wherein the connect plug comprises a metal plug formed in the through hole and an insulating film formed between the metal plug and a sidewall of the through hole.
According to a sixth aspect of the present invention, there is provided a chip according to the fourth aspect, wherein the connect plug comprises a metal plug formed in the through hole and having a cavity, an insulating film formed between the metal plug and a sidewall of the through hole, and a low stress film formed in the cavity of the metal plug, the low stress film being smaller than the metal plug in the difference in thermal expansion coefficient from the semiconductor substrate.
According to a seventh aspect of this invention, there is provided a chip according to the fourth aspect, wherein the connect plug comprises a metal plug formed in the through hole so that a space is left in the through hole on the top side of the semiconductor substrate, an insulating film formed between the metal plug and the sidewall of the through hole, and a cap layer formed in the space in the through hole.
According to an eighth aspect of the invention, there is provided a chip according to the fourth aspect, wherein the connect plug comprises a metal plug formed in the through hole so that a space is left in the through hole on the rear side of the semiconductor substrate, an insulating film formed between the metal plug and a sidewall of the through hole, and a connect member formed in the space in the through hole.
The rear side of the semiconductor substrate on the connect member side is preferably coated with an insulating film except the area of the connect member.
According to a ninth aspect of the present invention, there is provided a method of forming a chip for use in a multichip semiconductor device, comprising the steps of:
forming circuit components on a surface of semiconductor substrate;
forming an interlayer insulating film over the major surface of the semiconductor substrate;
selectively etching the interlayer insulating film and the semiconductor substrate to form a hole that passes through the interlayer insulating film but not the semiconductor substrate;
forming an insulating film on the sidewall and bottom of the hole to a thickness that does not fill up the hole;
filling the hole covered with the insulating film with a metal to form a metal plug; and
processing a rear side of the semiconductor substrate to thereby expose the metal plug at the bottom of the hole.
According to a tenth aspect of the invention, there is provided a method according to the ninth aspect, wherein the hole is formed prior to the formation of an interconnection layer which, of interconnection layers to be formed above the semiconductor substrate, has the lowest melting point.
According to an eleventh aspect of the present invention, there is provided a method according to the ninth aspect, in which the step of processing the rear side of the semiconductor substrate is performed after the semiconductor substrate has been cut out from a wafer.
According to a twelfth aspect of the present invention, there is provided a method of forming a chip for use in a multichip semiconductor device, comprising the steps of:
manufacturing circuit components on a surface of semiconductor substrate using integrated-circuit techniques;
forming an interlayer insulating film on the surface of the semiconductor substrate;
selectively etching the interlayer insulating film and the semiconductor substrate to form a hole that passe
Hayasaka Nobuo
Matsuo Mie
Okumura Katsuya
Sasaki Keiichi
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Parekh Nitin
LandOfFree
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