Multichip module

Details Multichip module Multichip module

2005-07-19

2005-07-19

Fahmy, Wael (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S685000, C257S777000, C257S723000, C257S787000, C257S789000, C257S795000

Reexamination Certificate

active

06919627

ABSTRACT:
A multi-chip module is proposed, which is designed to pack two or more semi-conductor chips in a stacked manner over a chip carrier in a single package. The multi-chip module is characterized by the use of adhesive with fillers to allow the topmost chip (i.e. the second chip) superimposed to the bottommost chip (i.e. the first chip) after the first chip electrically connected to the chip carrier. The thickness of the adhesive layer depends on the diameter of the fillers higher than loop height of the bonding wires that is positioned above the active surface of the first chip to prevent the bonding wires connected to the first chip to come in contact with the overlaid chip.

REFERENCES:
patent: 5323060 (1994-06-01), Fogal et al.
patent: 6005778 (1999-12-01), Spielberger et al.
patent: 6388313 (2002-05-01), Lee et al.
patent: 2003/0054162 (2003-03-01), Watson
patent: 2003/0141582 (2003-07-01), Yang et al.

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