Multichannel broadband transceiver system making use of a distri

Multiplex communications – Communication over free space – Having a plurality of contiguous regions served by...

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370345, H04J 300

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061342297

ABSTRACT:
A control message communication mechanism for use in a broadband transceiver system that includes multiple digital signal processors for performing real time signal processing tasks. One of the digital signal processor (DSPs) is designated as a master DSP. The remainder of the DSPs are arranged in rows and columns to provide a two-dimensional array. A pair of bit-serial interfaces on each DSP are connected in a vertical bus and horizontal loop arrangement. The vertical bus arrangement provides a primary mechanism for the master DSP to communicate control messages to the array DSPs. The horizontal loop mechanism provides a secondary way for DSPs to communicate control information with one another, without involving the master DSP, such as may be required to handle a particular call, without interrupting the more time critical primary connectivity mechanism.

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patent: 5539730 (1996-07-01), Dent
Baines R: "The DSP Bottleneck," IEEE Communications Magazine, vol. 33, No. 5, New York, US, pp. 46-54, May 1995.
Patent Abstracts of Japan vol. 017, No. 039 (E-1311), Jan. 25, 1993 & JP 04 256294 A (Toshiba Corp), Sep. 10, 1992, see abstract.

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