Multibit ROM memory

Static information storage and retrieval – Read only systems – Semiconductive

Reexamination Certificate

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Details

C365S094000, C365S103000

Reexamination Certificate

active

07660143

ABSTRACT:
The invention concerns a ROM comprising a set of memory points arranged in rows and columns, each memory point capable of storing two bits of data and comprising a single switch controllable to connect together first and second terminals of said switch, each of said first and second terminals being connected to one of first, second and third conductive lines, wherein said switch is connected via said first and second terminals between said first and second lines to encode a first data value, between said first and third lines to encode a second data value, between said second and third lines to encode a third data value, and both of said first and second terminals being connected to the same one of said first, second and third lines to encode a fourth data value.

REFERENCES:
patent: 5870326 (1999-02-01), Schuelein
patent: 6002607 (1999-12-01), Dvir
patent: 6636434 (2003-10-01), Poullet
patent: 2003/0086305 (2003-05-01), Poullet
patent: 2005/0018465 (2005-01-01), Jeung et al.
patent: 2005/0213362 (2005-09-01), Chang
patent: 2006/0215436 (2006-09-01), Jeung et al.
patent: 2 749 434 (1997-12-01), None
patent: 2 826 170 (2002-12-01), None

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